1 /*
2  * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <common/bl_common.h>
8 #include <common/debug.h>
9 #include <smmu.h>
10 #include <tegra_def.h>
11 
12 #define BOARD_SYSTEM_FPGA_BASE		U(1)
13 #define BASE_CONFIG_SMMU_DEVICES	U(2)
14 #define MAX_NUM_SMMU_DEVICES		U(3)
15 
tegra_misc_read_32(uint32_t off)16 static uint32_t tegra_misc_read_32(uint32_t off)
17 {
18 	return mmio_read_32((uintptr_t)TEGRA_MISC_BASE + off);
19 }
20 
21 /*******************************************************************************
22  * Handler to return the support SMMU devices number
23  ******************************************************************************/
plat_get_num_smmu_devices(void)24 uint32_t plat_get_num_smmu_devices(void)
25 {
26 	uint32_t ret_num = MAX_NUM_SMMU_DEVICES;
27 	uint32_t board_revid = ((tegra_misc_read_32(MISCREG_EMU_REVID) >> \
28 							BOARD_SHIFT_BITS) & BOARD_MASK_BITS);
29 
30 	if (board_revid == BOARD_SYSTEM_FPGA_BASE) {
31 		ret_num = BASE_CONFIG_SMMU_DEVICES;
32 	}
33 
34 	return ret_num;
35 }
36