1#
2# Copyright (c) 2019-2020, Linaro Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7CRASH_REPORTING	:=	1
8
9include lib/libfdt/libfdt.mk
10
11ifeq (${SPM_MM},1)
12NEED_BL32		:=	yes
13EL3_EXCEPTION_HANDLING	:=	1
14GICV2_G0_FOR_EL3	:=	1
15endif
16
17# Enable new version of image loading on QEMU platforms
18LOAD_IMAGE_V2		:=	1
19
20ifeq ($(NEED_BL32),yes)
21$(eval $(call add_define,QEMU_LOAD_BL32))
22endif
23
24PLAT_QEMU_PATH		:=	plat/qemu/qemu_sbsa
25PLAT_QEMU_COMMON_PATH	:=	plat/qemu/common
26PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
27				-I${PLAT_QEMU_COMMON_PATH}/include		\
28				-I${PLAT_QEMU_PATH}/include			\
29				-Iinclude/common/tbbr
30
31PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/${ARCH}
32
33PLAT_BL_COMMON_SOURCES	:=	${PLAT_QEMU_COMMON_PATH}/qemu_common.c		\
34				${PLAT_QEMU_COMMON_PATH}/qemu_console.c		\
35				drivers/arm/pl011/${ARCH}/pl011_console.S
36
37include lib/xlat_tables_v2/xlat_tables.mk
38PLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}
39
40BL1_SOURCES		+=	drivers/io/io_semihosting.c			\
41				drivers/io/io_storage.c				\
42				drivers/io/io_fip.c				\
43				drivers/io/io_memmap.c				\
44				lib/semihosting/semihosting.c			\
45				lib/semihosting/${ARCH}/semihosting_call.S	\
46				${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c	\
47				${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S	\
48				${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c
49
50BL1_SOURCES		+=	lib/cpus/aarch64/cortex_a57.S			\
51				lib/cpus/aarch64/cortex_a72.S			\
52				lib/cpus/aarch64/qemu_max.S			\
53
54BL2_SOURCES		+=	drivers/io/io_semihosting.c			\
55				drivers/io/io_storage.c				\
56				drivers/io/io_fip.c				\
57				drivers/io/io_memmap.c				\
58				lib/semihosting/semihosting.c			\
59				lib/semihosting/${ARCH}/semihosting_call.S	\
60				${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c	\
61				${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S	\
62				${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c	\
63				common/fdt_fixup.c				\
64				$(LIBFDT_SRCS)
65ifeq (${LOAD_IMAGE_V2},1)
66BL2_SOURCES		+=	${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c	\
67				${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c		\
68				common/desc_image_load.c
69endif
70
71# Include GICv3 driver files
72include drivers/arm/gic/v3/gicv3.mk
73
74QEMU_GIC_SOURCES	:=	${GICV3_SOURCES}				\
75				plat/common/plat_gicv3.c			\
76				${PLAT_QEMU_COMMON_PATH}/qemu_gicv3.c
77
78BL31_SOURCES		+=	lib/cpus/aarch64/cortex_a57.S			\
79				lib/cpus/aarch64/cortex_a72.S			\
80				lib/cpus/aarch64/qemu_max.S			\
81				lib/semihosting/semihosting.c			\
82				lib/semihosting/${ARCH}/semihosting_call.S	\
83				plat/common/plat_psci_common.c			\
84				${PLAT_QEMU_PATH}/sbsa_pm.c			\
85				${PLAT_QEMU_PATH}/sbsa_topology.c		\
86				${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S	\
87				${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c	\
88				common/fdt_fixup.c				\
89				common/fdt_wrappers.c				\
90				${QEMU_GIC_SOURCES}
91ifeq (${SPM_MM},1)
92	BL31_SOURCES		+=	${PLAT_QEMU_COMMON_PATH}/qemu_spm.c
93endif
94
95SEPARATE_CODE_AND_RODATA	:= 1
96ENABLE_STACK_PROTECTOR		:= 0
97ifneq ($(ENABLE_STACK_PROTECTOR), 0)
98	PLAT_BL_COMMON_SOURCES	+=	${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
99endif
100
101MULTI_CONSOLE_API	:= 1
102
103# Disable the PSCI platform compatibility layer
104ENABLE_PLAT_COMPAT	:= 0
105
106# Use known base for UEFI if not given from command line
107# By default BL33 is at FLASH1 base
108PRELOADED_BL33_BASE	?= 0x10000000
109
110# Qemu SBSA plafrom only support SEC_SRAM
111BL32_RAM_LOCATION_ID	= SEC_SRAM_ID
112$(eval $(call add_define,BL32_RAM_LOCATION_ID))
113
114# Don't have the Linux kernel as a BL33 image by default
115ARM_LINUX_KERNEL_AS_BL33	:=	0
116$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
117$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
118
119ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
120$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
121
122# Do not enable SVE
123ENABLE_SVE_FOR_NS	:= 0
124