1 /*
2 * Copyright (c) 2019-2021, Renesas Electronics Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <arch_helpers.h>
10 #include <drivers/console.h>
11 #include <lib/xlat_tables/xlat_mmu_helpers.h>
12 #include <plat/common/platform.h>
13
14 #include <lib/mmio.h>
15 #include <cpg_registers.h>
16
17 #define MSTP318 (1 << 18)
18 #define MSTP319 (1 << 19)
19 #define PMSR 0x5c
20 #define PMSR_L1FAEG (1U << 31)
21 #define PMSR_PMEL1RX (1 << 23)
22 #define PMCTLR 0x60
23 #define PMSR_L1IATN (1U << 31)
24
rcar_pcie_fixup(unsigned int controller)25 static int rcar_pcie_fixup(unsigned int controller)
26 {
27 uint32_t rcar_pcie_base[] = { 0xfe011000, 0xee811000 };
28 uint32_t addr = rcar_pcie_base[controller];
29 uint32_t cpg, pmsr;
30 int ret = 0;
31
32 /* Test if PCIECx is enabled */
33 cpg = mmio_read_32(CPG_MSTPSR3);
34 if (cpg & (MSTP318 << !controller))
35 return ret;
36
37 pmsr = mmio_read_32(addr + PMSR);
38
39 if ((pmsr & PMSR_PMEL1RX) && ((pmsr & 0x70000) != 0x30000)) {
40 /* Fix applicable */
41 mmio_write_32(addr + PMCTLR, PMSR_L1IATN);
42 while (!(mmio_read_32(addr + PMSR) & PMSR_L1FAEG))
43 ;
44 mmio_write_32(addr + PMSR, PMSR_L1FAEG | PMSR_PMEL1RX);
45 ret = 1;
46 }
47
48 return ret;
49 }
50
51 /* RAS functions common to AArch64 ARM platforms */
plat_ea_handler(unsigned int ea_reason,uint64_t syndrome,void * cookie,void * handle,uint64_t flags)52 void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
53 void *handle, uint64_t flags)
54 {
55 unsigned int fixed = 0;
56
57 fixed |= rcar_pcie_fixup(0);
58 fixed |= rcar_pcie_fixup(1);
59
60 if (fixed)
61 return;
62
63 plat_default_ea_handler(ea_reason, syndrome, cookie, handle, flags);
64 }
65
66 #include <drivers/renesas/rcar/console/console.h>
67
68 static console_t rcar_boot_console;
69 static console_t rcar_runtime_console;
70
rcar_console_boot_init(void)71 void rcar_console_boot_init(void)
72 {
73 int ret;
74
75 ret = console_rcar_register(0, 0, 0, &rcar_boot_console);
76 if (!ret)
77 panic();
78
79 console_set_scope(&rcar_boot_console, CONSOLE_FLAG_BOOT);
80 }
81
rcar_console_boot_end(void)82 void rcar_console_boot_end(void)
83 {
84 }
85
rcar_console_runtime_init(void)86 void rcar_console_runtime_init(void)
87 {
88 int ret;
89
90 ret = console_rcar_register(1, 0, 0, &rcar_runtime_console);
91 if (!ret)
92 panic();
93
94 console_set_scope(&rcar_boot_console, CONSOLE_FLAG_RUNTIME);
95 }
96
rcar_console_runtime_end(void)97 void rcar_console_runtime_end(void)
98 {
99 }
100