1 /*
2 * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <string.h>
9
10 #include <platform_def.h>
11
12 #include <arch_helpers.h>
13 #include <common/debug.h>
14 #include <drivers/io/io_block.h>
15 #include <drivers/io/io_driver.h>
16 #include <drivers/io/io_dummy.h>
17 #include <drivers/io/io_mtd.h>
18 #include <drivers/io/io_storage.h>
19 #include <drivers/mmc.h>
20 #include <drivers/partition/partition.h>
21 #include <drivers/raw_nand.h>
22 #include <drivers/spi_nand.h>
23 #include <drivers/spi_nor.h>
24 #include <drivers/st/io_mmc.h>
25 #include <drivers/st/io_stm32image.h>
26 #include <drivers/st/stm32_fmc2_nand.h>
27 #include <drivers/st/stm32_qspi.h>
28 #include <drivers/st/stm32_sdmmc2.h>
29 #include <lib/mmio.h>
30 #include <lib/utils.h>
31 #include <plat/common/platform.h>
32
33 /* IO devices */
34 #ifndef AARCH32_SP_OPTEE
35 static const io_dev_connector_t *dummy_dev_con;
36 static uintptr_t dummy_dev_handle;
37 static uintptr_t dummy_dev_spec;
38 #endif
39
40 static uintptr_t image_dev_handle;
41 static uintptr_t storage_dev_handle;
42
43 #if STM32MP_SDMMC || STM32MP_EMMC
44 static struct mmc_device_info mmc_info;
45 static io_block_spec_t gpt_block_spec = {
46 .offset = 0,
47 .length = 34 * MMC_BLOCK_SIZE, /* Size of GPT table */
48 };
49
50 static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE);
51
52 static const io_block_dev_spec_t mmc_block_dev_spec = {
53 /* It's used as temp buffer in block driver */
54 .buffer = {
55 .offset = (size_t)&block_buffer,
56 .length = MMC_BLOCK_SIZE,
57 },
58 .ops = {
59 .read = mmc_read_blocks,
60 .write = NULL,
61 },
62 .block_size = MMC_BLOCK_SIZE,
63 };
64
65 #if STM32MP_EMMC_BOOT
66 static io_block_spec_t emmc_boot_ssbl_block_spec = {
67 .offset = PLAT_EMMC_BOOT_SSBL_OFFSET,
68 .length = MMC_BLOCK_SIZE, /* We are interested only in first 4 bytes */
69 };
70
71 static const io_block_dev_spec_t mmc_block_dev_boot_part_spec = {
72 /* It's used as temp buffer in block driver */
73 .buffer = {
74 .offset = (size_t)&block_buffer,
75 .length = MMC_BLOCK_SIZE,
76 },
77 .ops = {
78 .read = mmc_boot_part_read_blocks,
79 .write = NULL,
80 },
81 .block_size = MMC_BLOCK_SIZE,
82 };
83 #endif
84
85 static struct io_mmc_dev_spec mmc_device_spec = {
86 .use_boot_part = false,
87 };
88
89 static const io_dev_connector_t *mmc_dev_con;
90 #endif /* STM32MP_SDMMC || STM32MP_EMMC */
91
92 #if STM32MP_SPI_NOR
93 static io_mtd_dev_spec_t spi_nor_dev_spec = {
94 .ops = {
95 .init = spi_nor_init,
96 .read = spi_nor_read,
97 },
98 };
99 #endif
100
101 #if STM32MP_RAW_NAND
102 static io_mtd_dev_spec_t nand_dev_spec = {
103 .ops = {
104 .init = nand_raw_init,
105 .read = nand_read,
106 },
107 };
108
109 static const io_dev_connector_t *nand_dev_con;
110 #endif
111
112 #if STM32MP_SPI_NAND
113 static io_mtd_dev_spec_t spi_nand_dev_spec = {
114 .ops = {
115 .init = spi_nand_init,
116 .read = nand_read,
117 },
118 };
119 #endif
120
121 #if STM32MP_SPI_NAND || STM32MP_SPI_NOR
122 static const io_dev_connector_t *spi_dev_con;
123 #endif
124
125 #ifdef AARCH32_SP_OPTEE
126 static const struct stm32image_part_info optee_header_partition_spec = {
127 .name = OPTEE_HEADER_IMAGE_NAME,
128 .binary_type = OPTEE_HEADER_BINARY_TYPE,
129 };
130
131 static const struct stm32image_part_info optee_core_partition_spec = {
132 .name = OPTEE_CORE_IMAGE_NAME,
133 .binary_type = OPTEE_CORE_BINARY_TYPE,
134 };
135
136 static const struct stm32image_part_info optee_paged_partition_spec = {
137 .name = OPTEE_PAGED_IMAGE_NAME,
138 .binary_type = OPTEE_PAGED_BINARY_TYPE,
139 };
140 #else
141 static const io_block_spec_t bl32_block_spec = {
142 .offset = BL32_BASE,
143 .length = STM32MP_BL32_SIZE
144 };
145 #endif
146
147 static const struct stm32image_part_info bl33_partition_spec = {
148 .name = BL33_IMAGE_NAME,
149 .binary_type = BL33_BINARY_TYPE,
150 };
151
152 enum {
153 IMG_IDX_BL33,
154 #ifdef AARCH32_SP_OPTEE
155 IMG_IDX_OPTEE_HEADER,
156 IMG_IDX_OPTEE_CORE,
157 IMG_IDX_OPTEE_PAGED,
158 #endif
159 IMG_IDX_NUM
160 };
161
162 static struct stm32image_device_info stm32image_dev_info_spec __unused = {
163 .lba_size = MMC_BLOCK_SIZE,
164 .part_info[IMG_IDX_BL33] = {
165 .name = BL33_IMAGE_NAME,
166 .binary_type = BL33_BINARY_TYPE,
167 },
168 #ifdef AARCH32_SP_OPTEE
169 .part_info[IMG_IDX_OPTEE_HEADER] = {
170 .name = OPTEE_HEADER_IMAGE_NAME,
171 .binary_type = OPTEE_HEADER_BINARY_TYPE,
172 },
173 .part_info[IMG_IDX_OPTEE_CORE] = {
174 .name = OPTEE_CORE_IMAGE_NAME,
175 .binary_type = OPTEE_CORE_BINARY_TYPE,
176 },
177 .part_info[IMG_IDX_OPTEE_PAGED] = {
178 .name = OPTEE_PAGED_IMAGE_NAME,
179 .binary_type = OPTEE_PAGED_BINARY_TYPE,
180 },
181 #endif
182 };
183
184 static io_block_spec_t stm32image_block_spec = {
185 .offset = 0,
186 .length = 0,
187 };
188
189 static const io_dev_connector_t *stm32image_dev_con __unused;
190
191 #ifndef AARCH32_SP_OPTEE
192 static int open_dummy(const uintptr_t spec);
193 #endif
194 static int open_image(const uintptr_t spec);
195 static int open_storage(const uintptr_t spec);
196
197 struct plat_io_policy {
198 uintptr_t *dev_handle;
199 uintptr_t image_spec;
200 int (*check)(const uintptr_t spec);
201 };
202
203 static const struct plat_io_policy policies[] = {
204 #ifdef AARCH32_SP_OPTEE
205 [BL32_IMAGE_ID] = {
206 .dev_handle = &image_dev_handle,
207 .image_spec = (uintptr_t)&optee_header_partition_spec,
208 .check = open_image
209 },
210 [BL32_EXTRA1_IMAGE_ID] = {
211 .dev_handle = &image_dev_handle,
212 .image_spec = (uintptr_t)&optee_core_partition_spec,
213 .check = open_image
214 },
215 [BL32_EXTRA2_IMAGE_ID] = {
216 .dev_handle = &image_dev_handle,
217 .image_spec = (uintptr_t)&optee_paged_partition_spec,
218 .check = open_image
219 },
220 #else
221 [BL32_IMAGE_ID] = {
222 .dev_handle = &dummy_dev_handle,
223 .image_spec = (uintptr_t)&bl32_block_spec,
224 .check = open_dummy
225 },
226 #endif
227 [BL33_IMAGE_ID] = {
228 .dev_handle = &image_dev_handle,
229 .image_spec = (uintptr_t)&bl33_partition_spec,
230 .check = open_image
231 },
232 #if STM32MP_SDMMC || STM32MP_EMMC
233 [GPT_IMAGE_ID] = {
234 .dev_handle = &storage_dev_handle,
235 .image_spec = (uintptr_t)&gpt_block_spec,
236 .check = open_storage
237 },
238 #endif
239 [STM32_IMAGE_ID] = {
240 .dev_handle = &storage_dev_handle,
241 .image_spec = (uintptr_t)&stm32image_block_spec,
242 .check = open_storage
243 }
244 };
245
246 #ifndef AARCH32_SP_OPTEE
open_dummy(const uintptr_t spec)247 static int open_dummy(const uintptr_t spec)
248 {
249 return io_dev_init(dummy_dev_handle, 0);
250 }
251 #endif
252
open_image(const uintptr_t spec)253 static int open_image(const uintptr_t spec)
254 {
255 return io_dev_init(image_dev_handle, 0);
256 }
257
open_storage(const uintptr_t spec)258 static int open_storage(const uintptr_t spec)
259 {
260 return io_dev_init(storage_dev_handle, 0);
261 }
262
263 #if STM32MP_EMMC_BOOT
get_boot_part_ssbl_header(void)264 static uint32_t get_boot_part_ssbl_header(void)
265 {
266 uint32_t magic = 0;
267 int io_result;
268 size_t bytes_read;
269
270 io_result = register_io_dev_block(&mmc_dev_con);
271 if (io_result != 0) {
272 panic();
273 }
274
275 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_boot_part_spec,
276 &storage_dev_handle);
277 assert(io_result == 0);
278
279 io_result = io_open(storage_dev_handle, (uintptr_t) &emmc_boot_ssbl_block_spec,
280 &image_dev_handle);
281 assert(io_result == 0);
282
283 io_result = io_read(image_dev_handle, (uintptr_t) &magic, sizeof(magic),
284 &bytes_read);
285 assert(io_result == 0);
286 assert(bytes_read == sizeof(magic));
287
288 io_result = io_dev_close(storage_dev_handle);
289 assert(io_result == 0);
290
291 return magic;
292 }
293 #endif
294
print_boot_device(boot_api_context_t * boot_context)295 static void print_boot_device(boot_api_context_t *boot_context)
296 {
297 switch (boot_context->boot_interface_selected) {
298 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
299 INFO("Using SDMMC\n");
300 break;
301 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
302 INFO("Using EMMC\n");
303 break;
304 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
305 INFO("Using QSPI NOR\n");
306 break;
307 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
308 INFO("Using FMC NAND\n");
309 break;
310 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
311 INFO("Using SPI NAND\n");
312 break;
313 default:
314 ERROR("Boot interface not found\n");
315 panic();
316 break;
317 }
318
319 if (boot_context->boot_interface_instance != 0U) {
320 INFO(" Instance %d\n", boot_context->boot_interface_instance);
321 }
322 }
323
stm32image_io_setup(void)324 static void stm32image_io_setup(void)
325 {
326 int io_result __unused;
327
328 io_result = register_io_dev_stm32image(&stm32image_dev_con);
329 assert(io_result == 0);
330
331 io_result = io_dev_open(stm32image_dev_con,
332 (uintptr_t)&stm32image_dev_info_spec,
333 &image_dev_handle);
334 assert(io_result == 0);
335 }
336
337 #if STM32MP_SDMMC || STM32MP_EMMC
boot_mmc(enum mmc_device_type mmc_dev_type,uint16_t boot_interface_instance)338 static void boot_mmc(enum mmc_device_type mmc_dev_type,
339 uint16_t boot_interface_instance)
340 {
341 int io_result __unused;
342 uint8_t idx;
343 struct stm32image_part_info *part;
344 struct stm32_sdmmc2_params params;
345 const partition_entry_t *entry __unused;
346 uint32_t magic __unused;
347
348 zeromem(¶ms, sizeof(struct stm32_sdmmc2_params));
349
350 mmc_info.mmc_dev_type = mmc_dev_type;
351
352 switch (boot_interface_instance) {
353 case 1:
354 params.reg_base = STM32MP_SDMMC1_BASE;
355 break;
356 case 2:
357 params.reg_base = STM32MP_SDMMC2_BASE;
358 break;
359 case 3:
360 params.reg_base = STM32MP_SDMMC3_BASE;
361 break;
362 default:
363 WARN("SDMMC instance not found, using default\n");
364 if (mmc_dev_type == MMC_IS_SD) {
365 params.reg_base = STM32MP_SDMMC1_BASE;
366 } else {
367 params.reg_base = STM32MP_SDMMC2_BASE;
368 }
369 break;
370 }
371
372 params.device_info = &mmc_info;
373 if (stm32_sdmmc2_mmc_init(¶ms) != 0) {
374 ERROR("SDMMC%u init failed\n", boot_interface_instance);
375 panic();
376 }
377
378 stm32image_dev_info_spec.device_size =
379 stm32_sdmmc2_mmc_get_device_size();
380
381 #if STM32MP_EMMC_BOOT
382 magic = get_boot_part_ssbl_header();
383
384 if (magic == BOOT_API_IMAGE_HEADER_MAGIC_NB) {
385 VERBOSE("%s, header found, jump to emmc load\n", __func__);
386 idx = IMG_IDX_BL33;
387 part = &stm32image_dev_info_spec.part_info[idx];
388 part->part_offset = PLAT_EMMC_BOOT_SSBL_OFFSET;
389 part->bkp_offset = 0U;
390 mmc_device_spec.use_boot_part = true;
391
392 goto emmc_boot;
393 } else {
394 WARN("%s: Can't find STM32 header on a boot partition\n", __func__);
395 }
396 #endif
397
398 /* Open MMC as a block device to read GPT table */
399 io_result = register_io_dev_block(&mmc_dev_con);
400 if (io_result != 0) {
401 panic();
402 }
403
404 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec,
405 &storage_dev_handle);
406 assert(io_result == 0);
407
408 partition_init(GPT_IMAGE_ID);
409
410 io_result = io_dev_close(storage_dev_handle);
411 assert(io_result == 0);
412
413 for (idx = 0U; idx < IMG_IDX_NUM; idx++) {
414 part = &stm32image_dev_info_spec.part_info[idx];
415 entry = get_partition_entry(part->name);
416 if (entry == NULL) {
417 ERROR("Partition %s not found\n", part->name);
418 panic();
419 }
420
421 part->part_offset = entry->start;
422 part->bkp_offset = 0U;
423 }
424
425 #if STM32MP_EMMC_BOOT
426 emmc_boot:
427 #endif
428 /*
429 * Re-open MMC with io_mmc, for better perfs compared to
430 * io_block.
431 */
432 io_result = register_io_dev_mmc(&mmc_dev_con);
433 assert(io_result == 0);
434
435 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_device_spec,
436 &storage_dev_handle);
437 assert(io_result == 0);
438 }
439 #endif /* STM32MP_SDMMC || STM32MP_EMMC */
440
441 #if STM32MP_SPI_NOR
boot_spi_nor(boot_api_context_t * boot_context)442 static void boot_spi_nor(boot_api_context_t *boot_context)
443 {
444 int io_result __unused;
445 uint8_t idx;
446 struct stm32image_part_info *part;
447
448 io_result = stm32_qspi_init();
449 assert(io_result == 0);
450
451 io_result = register_io_dev_mtd(&spi_dev_con);
452 assert(io_result == 0);
453
454 /* Open connections to device */
455 io_result = io_dev_open(spi_dev_con,
456 (uintptr_t)&spi_nor_dev_spec,
457 &storage_dev_handle);
458 assert(io_result == 0);
459
460 stm32image_dev_info_spec.device_size = spi_nor_dev_spec.device_size;
461
462 idx = IMG_IDX_BL33;
463 part = &stm32image_dev_info_spec.part_info[idx];
464 part->part_offset = STM32MP_NOR_BL33_OFFSET;
465 part->bkp_offset = 0U;
466
467 #ifdef AARCH32_SP_OPTEE
468 idx = IMG_IDX_OPTEE_HEADER;
469 part = &stm32image_dev_info_spec.part_info[idx];
470 part->part_offset = STM32MP_NOR_TEEH_OFFSET;
471 part->bkp_offset = 0U;
472
473 idx = IMG_IDX_OPTEE_PAGED;
474 part = &stm32image_dev_info_spec.part_info[idx];
475 part->part_offset = STM32MP_NOR_TEED_OFFSET;
476 part->bkp_offset = 0U;
477
478 idx = IMG_IDX_OPTEE_CORE;
479 part = &stm32image_dev_info_spec.part_info[idx];
480 part->part_offset = STM32MP_NOR_TEEX_OFFSET;
481 part->bkp_offset = 0U;
482 #endif
483 }
484 #endif /* STM32MP_SPI_NOR */
485
486 #if STM32MP_RAW_NAND
boot_fmc2_nand(boot_api_context_t * boot_context)487 static void boot_fmc2_nand(boot_api_context_t *boot_context)
488 {
489 int io_result __unused;
490 uint8_t idx;
491 struct stm32image_part_info *part;
492
493 io_result = stm32_fmc2_init();
494 assert(io_result == 0);
495
496 /* Register the IO device on this platform */
497 io_result = register_io_dev_mtd(&nand_dev_con);
498 assert(io_result == 0);
499
500 /* Open connections to device */
501 io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec,
502 &storage_dev_handle);
503 assert(io_result == 0);
504
505 stm32image_dev_info_spec.device_size = nand_dev_spec.device_size;
506
507 idx = IMG_IDX_BL33;
508 part = &stm32image_dev_info_spec.part_info[idx];
509 part->part_offset = STM32MP_NAND_BL33_OFFSET;
510 part->bkp_offset = nand_dev_spec.erase_size;
511
512 #ifdef AARCH32_SP_OPTEE
513 idx = IMG_IDX_OPTEE_HEADER;
514 part = &stm32image_dev_info_spec.part_info[idx];
515 part->part_offset = STM32MP_NAND_TEEH_OFFSET;
516 part->bkp_offset = nand_dev_spec.erase_size;
517
518 idx = IMG_IDX_OPTEE_PAGED;
519 part = &stm32image_dev_info_spec.part_info[idx];
520 part->part_offset = STM32MP_NAND_TEED_OFFSET;
521 part->bkp_offset = nand_dev_spec.erase_size;
522
523 idx = IMG_IDX_OPTEE_CORE;
524 part = &stm32image_dev_info_spec.part_info[idx];
525 part->part_offset = STM32MP_NAND_TEEX_OFFSET;
526 part->bkp_offset = nand_dev_spec.erase_size;
527 #endif
528 }
529 #endif /* STM32MP_RAW_NAND */
530
531 #if STM32MP_SPI_NAND
boot_spi_nand(boot_api_context_t * boot_context)532 static void boot_spi_nand(boot_api_context_t *boot_context)
533 {
534 int io_result __unused;
535 uint8_t idx;
536 struct stm32image_part_info *part;
537
538 io_result = stm32_qspi_init();
539 assert(io_result == 0);
540
541 io_result = register_io_dev_mtd(&spi_dev_con);
542 assert(io_result == 0);
543
544 /* Open connections to device */
545 io_result = io_dev_open(spi_dev_con,
546 (uintptr_t)&spi_nand_dev_spec,
547 &storage_dev_handle);
548 assert(io_result == 0);
549
550 stm32image_dev_info_spec.device_size =
551 spi_nand_dev_spec.device_size;
552
553 idx = IMG_IDX_BL33;
554 part = &stm32image_dev_info_spec.part_info[idx];
555 part->part_offset = STM32MP_NAND_BL33_OFFSET;
556 part->bkp_offset = spi_nand_dev_spec.erase_size;
557
558 #ifdef AARCH32_SP_OPTEE
559 idx = IMG_IDX_OPTEE_HEADER;
560 part = &stm32image_dev_info_spec.part_info[idx];
561 part->part_offset = STM32MP_NAND_TEEH_OFFSET;
562 part->bkp_offset = spi_nand_dev_spec.erase_size;
563
564 idx = IMG_IDX_OPTEE_PAGED;
565 part = &stm32image_dev_info_spec.part_info[idx];
566 part->part_offset = STM32MP_NAND_TEED_OFFSET;
567 part->bkp_offset = spi_nand_dev_spec.erase_size;
568
569 idx = IMG_IDX_OPTEE_CORE;
570 part = &stm32image_dev_info_spec.part_info[idx];
571 part->part_offset = STM32MP_NAND_TEEX_OFFSET;
572 part->bkp_offset = spi_nand_dev_spec.erase_size;
573 #endif
574 }
575 #endif /* STM32MP_SPI_NAND */
576
stm32mp_io_setup(void)577 void stm32mp_io_setup(void)
578 {
579 int io_result __unused;
580 boot_api_context_t *boot_context =
581 (boot_api_context_t *)stm32mp_get_boot_ctx_address();
582
583 print_boot_device(boot_context);
584
585 if ((boot_context->boot_partition_used_toboot == 1U) ||
586 (boot_context->boot_partition_used_toboot == 2U)) {
587 INFO("Boot used partition fsbl%d\n",
588 boot_context->boot_partition_used_toboot);
589 }
590
591 #ifndef AARCH32_SP_OPTEE
592 io_result = register_io_dev_dummy(&dummy_dev_con);
593 assert(io_result == 0);
594
595 io_result = io_dev_open(dummy_dev_con, dummy_dev_spec,
596 &dummy_dev_handle);
597 assert(io_result == 0);
598 #endif
599
600 switch (boot_context->boot_interface_selected) {
601 #if STM32MP_SDMMC
602 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
603 dmbsy();
604 boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
605 stm32image_io_setup();
606 break;
607 #endif
608 #if STM32MP_EMMC
609 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
610 dmbsy();
611 boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
612 stm32image_io_setup();
613 break;
614 #endif
615 #if STM32MP_SPI_NOR
616 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
617 dmbsy();
618 boot_spi_nor(boot_context);
619 stm32image_io_setup();
620 break;
621 #endif
622 #if STM32MP_RAW_NAND
623 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
624 dmbsy();
625 boot_fmc2_nand(boot_context);
626 stm32image_io_setup();
627 break;
628 #endif
629 #if STM32MP_SPI_NAND
630 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
631 dmbsy();
632 boot_spi_nand(boot_context);
633 stm32image_io_setup();
634 break;
635 #endif
636
637 default:
638 ERROR("Boot interface %d not supported\n",
639 boot_context->boot_interface_selected);
640 panic();
641 break;
642 }
643 }
644
645 /*
646 * Return an IO device handle and specification which can be used to access
647 * an image. Use this to enforce platform load policy.
648 */
plat_get_image_source(unsigned int image_id,uintptr_t * dev_handle,uintptr_t * image_spec)649 int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
650 uintptr_t *image_spec)
651 {
652 int rc;
653 const struct plat_io_policy *policy;
654
655 assert(image_id < ARRAY_SIZE(policies));
656
657 policy = &policies[image_id];
658 rc = policy->check(policy->image_spec);
659 if (rc == 0) {
660 *image_spec = policy->image_spec;
661 *dev_handle = *(policy->dev_handle);
662 }
663
664 return rc;
665 }
666