1/* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <bl1/bl1.h> 10#include <common/bl_common.h> 11#include <context.h> 12 13/* ----------------------------------------------------------------------------- 14 * Very simple stackless exception handlers used by BL2. 15 * ----------------------------------------------------------------------------- 16 */ 17 .globl bl2_el3_exceptions 18 19vector_base bl2_el3_exceptions 20 21 /* ----------------------------------------------------- 22 * Current EL with SP0 : 0x0 - 0x200 23 * ----------------------------------------------------- 24 */ 25vector_entry SynchronousExceptionSP0 26 mov x0, #SYNC_EXCEPTION_SP_EL0 27 bl plat_report_exception 28 no_ret plat_panic_handler 29end_vector_entry SynchronousExceptionSP0 30 31vector_entry IrqSP0 32 mov x0, #IRQ_SP_EL0 33 bl plat_report_exception 34 no_ret plat_panic_handler 35end_vector_entry IrqSP0 36 37vector_entry FiqSP0 38 mov x0, #FIQ_SP_EL0 39 bl plat_report_exception 40 no_ret plat_panic_handler 41end_vector_entry FiqSP0 42 43vector_entry SErrorSP0 44 mov x0, #SERROR_SP_EL0 45 bl plat_report_exception 46 no_ret plat_panic_handler 47end_vector_entry SErrorSP0 48 49 /* ----------------------------------------------------- 50 * Current EL with SPx: 0x200 - 0x400 51 * ----------------------------------------------------- 52 */ 53vector_entry SynchronousExceptionSPx 54 mov x0, #SYNC_EXCEPTION_SP_ELX 55 bl plat_report_exception 56 no_ret plat_panic_handler 57end_vector_entry SynchronousExceptionSPx 58 59vector_entry IrqSPx 60 mov x0, #IRQ_SP_ELX 61 bl plat_report_exception 62 no_ret plat_panic_handler 63end_vector_entry IrqSPx 64 65vector_entry FiqSPx 66 mov x0, #FIQ_SP_ELX 67 bl plat_report_exception 68 no_ret plat_panic_handler 69end_vector_entry FiqSPx 70 71vector_entry SErrorSPx 72 mov x0, #SERROR_SP_ELX 73 bl plat_report_exception 74 no_ret plat_panic_handler 75end_vector_entry SErrorSPx 76 77 /* ----------------------------------------------------- 78 * Lower EL using AArch64 : 0x400 - 0x600 79 * ----------------------------------------------------- 80 */ 81vector_entry SynchronousExceptionA64 82 mov x0, #SYNC_EXCEPTION_AARCH64 83 bl plat_report_exception 84 no_ret plat_panic_handler 85end_vector_entry SynchronousExceptionA64 86 87vector_entry IrqA64 88 mov x0, #IRQ_AARCH64 89 bl plat_report_exception 90 no_ret plat_panic_handler 91end_vector_entry IrqA64 92 93vector_entry FiqA64 94 mov x0, #FIQ_AARCH64 95 bl plat_report_exception 96 no_ret plat_panic_handler 97end_vector_entry FiqA64 98 99vector_entry SErrorA64 100 mov x0, #SERROR_AARCH64 101 bl plat_report_exception 102 no_ret plat_panic_handler 103end_vector_entry SErrorA64 104 105 /* ----------------------------------------------------- 106 * Lower EL using AArch32 : 0x600 - 0x800 107 * ----------------------------------------------------- 108 */ 109vector_entry SynchronousExceptionA32 110 mov x0, #SYNC_EXCEPTION_AARCH32 111 bl plat_report_exception 112 no_ret plat_panic_handler 113end_vector_entry SynchronousExceptionA32 114 115vector_entry IrqA32 116 mov x0, #IRQ_AARCH32 117 bl plat_report_exception 118 no_ret plat_panic_handler 119end_vector_entry IrqA32 120 121vector_entry FiqA32 122 mov x0, #FIQ_AARCH32 123 bl plat_report_exception 124 no_ret plat_panic_handler 125end_vector_entry FiqA32 126 127vector_entry SErrorA32 128 mov x0, #SERROR_AARCH32 129 bl plat_report_exception 130 no_ret plat_panic_handler 131end_vector_entry SErrorA32 132