1 /*
2 * Copyright (C) 2018 Marvell International Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 * https://spdx.org/licenses
6 */
7
8 /* AXI to M-Bridge decoding unit driver for Marvell Armada 8K and 8K+ SoCs */
9
10 #include <inttypes.h>
11 #include <stdint.h>
12
13 #include <common/debug.h>
14 #include <lib/mmio.h>
15
16 #include <armada_common.h>
17 #include <mvebu.h>
18 #include <mvebu_def.h>
19
20 #if LOG_LEVEL >= LOG_LEVEL_INFO
21 #define DEBUG_ADDR_MAP
22 #endif
23
24 /* common defines */
25 #define WIN_ENABLE_BIT (0x1)
26
27 #define MVEBU_AMB_ADEC_OFFSET (0x70ff00)
28
29 #define AMB_WIN_CR_OFFSET(win) (amb_base + 0x0 + (0x8 * win))
30 #define AMB_ATTR_OFFSET 8
31 #define AMB_ATTR_MASK 0xFF
32 #define AMB_SIZE_OFFSET 16
33 #define AMB_SIZE_MASK 0xFF
34
35 #define AMB_WIN_BASE_OFFSET(win) (amb_base + 0x4 + (0x8 * win))
36 #define AMB_BASE_OFFSET 16
37 #define AMB_BASE_ADDR_MASK ((1 << (32 - AMB_BASE_OFFSET)) - 1)
38
39 #define AMB_WIN_ALIGNMENT_64K (0x10000)
40 #define AMB_WIN_ALIGNMENT_1M (0x100000)
41
42 uintptr_t amb_base;
43
amb_check_win(struct addr_map_win * win,uint32_t win_num)44 static void amb_check_win(struct addr_map_win *win, uint32_t win_num)
45 {
46 uint32_t base_addr;
47
48 /* make sure the base address is in 16-bit range */
49 if (win->base_addr > AMB_BASE_ADDR_MASK) {
50 WARN("Window %d: base address is too big 0x%" PRIx64 "\n",
51 win_num, win->base_addr);
52 win->base_addr = AMB_BASE_ADDR_MASK;
53 WARN("Set the base address to 0x%" PRIx64 "\n", win->base_addr);
54 }
55
56 base_addr = win->base_addr << AMB_BASE_OFFSET;
57 /* for AMB The base is always 1M aligned */
58 /* check if address is aligned to 1M */
59 if (IS_NOT_ALIGN(base_addr, AMB_WIN_ALIGNMENT_1M)) {
60 win->base_addr = ALIGN_UP(base_addr, AMB_WIN_ALIGNMENT_1M);
61 WARN("Window %d: base address unaligned to 0x%x\n",
62 win_num, AMB_WIN_ALIGNMENT_1M);
63 WARN("Align up the base address to 0x%" PRIx64 "\n", win->base_addr);
64 }
65
66 /* size parameter validity check */
67 if (!IS_POWER_OF_2(win->win_size)) {
68 WARN("Window %d: window size is not power of 2 (0x%" PRIx64 ")\n",
69 win_num, win->win_size);
70 win->win_size = ROUND_UP_TO_POW_OF_2(win->win_size);
71 WARN("Rounding size to 0x%" PRIx64 "\n", win->win_size);
72 }
73 }
74
amb_enable_win(struct addr_map_win * win,uint32_t win_num)75 static void amb_enable_win(struct addr_map_win *win, uint32_t win_num)
76 {
77 uint32_t ctrl, base, size;
78
79 /*
80 * size is 64KB granularity.
81 * The number of ones specifies the size of the
82 * window in 64 KB granularity. 0 is 64KB
83 */
84 size = (win->win_size / AMB_WIN_ALIGNMENT_64K) - 1;
85 ctrl = (size << AMB_SIZE_OFFSET) | (win->target_id << AMB_ATTR_OFFSET);
86 base = win->base_addr << AMB_BASE_OFFSET;
87
88 mmio_write_32(AMB_WIN_BASE_OFFSET(win_num), base);
89 mmio_write_32(AMB_WIN_CR_OFFSET(win_num), ctrl);
90
91 /* enable window after configuring window size (and attributes) */
92 ctrl |= WIN_ENABLE_BIT;
93 mmio_write_32(AMB_WIN_CR_OFFSET(win_num), ctrl);
94 }
95
96 #ifdef DEBUG_ADDR_MAP
dump_amb_adec(void)97 static void dump_amb_adec(void)
98 {
99 uint32_t ctrl, base, win_id, attr;
100 uint32_t size, size_count;
101
102 /* Dump all AMB windows */
103 printf("bank attribute base size\n");
104 printf("--------------------------------------------\n");
105 for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) {
106 ctrl = mmio_read_32(AMB_WIN_CR_OFFSET(win_id));
107 if (ctrl & WIN_ENABLE_BIT) {
108 base = mmio_read_32(AMB_WIN_BASE_OFFSET(win_id));
109 attr = (ctrl >> AMB_ATTR_OFFSET) & AMB_ATTR_MASK;
110 size_count = (ctrl >> AMB_SIZE_OFFSET) & AMB_SIZE_MASK;
111 size = (size_count + 1) * AMB_WIN_ALIGNMENT_64K;
112 printf("amb 0x%04x 0x%08x 0x%08x\n",
113 attr, base, size);
114 }
115 }
116 }
117 #endif
118
init_amb_adec(uintptr_t base)119 int init_amb_adec(uintptr_t base)
120 {
121 struct addr_map_win *win;
122 uint32_t win_id, win_reg;
123 uint32_t win_count;
124
125 INFO("Initializing AXI to MBus Bridge Address decoding\n");
126
127 /* Get the base address of the AMB address decoding */
128 amb_base = base + MVEBU_AMB_ADEC_OFFSET;
129
130 /* Get the array of the windows and its size */
131 marvell_get_amb_memory_map(&win, &win_count, base);
132 if (win_count <= 0)
133 INFO("no windows configurations found\n");
134
135 if (win_count > AMB_MAX_WIN_ID) {
136 INFO("number of windows is bigger than %d\n", AMB_MAX_WIN_ID);
137 return 0;
138 }
139
140 /* disable all AMB windows */
141 for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) {
142 win_reg = mmio_read_32(AMB_WIN_CR_OFFSET(win_id));
143 win_reg &= ~WIN_ENABLE_BIT;
144 mmio_write_32(AMB_WIN_CR_OFFSET(win_id), win_reg);
145 }
146
147 /* enable relevant windows */
148 for (win_id = 0; win_id < win_count; win_id++, win++) {
149 amb_check_win(win, win_id);
150 amb_enable_win(win, win_id);
151 }
152
153 #ifdef DEBUG_ADDR_MAP
154 dump_amb_adec();
155 #endif
156
157 INFO("Done AXI to MBus Bridge Address decoding Initializing\n");
158
159 return 0;
160 }
161