1/*
2 * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef	FVP_DEFS_DYNAMIQ_DTSI
8#define	FVP_DEFS_DYNAMIQ_DTSI
9
10/* Set default topology values if not passed from platform's makefile */
11#ifdef	FVP_CLUSTER_COUNT
12#define	CLUSTER_COUNT		FVP_CLUSTER_COUNT
13#else
14#define	CLUSTER_COUNT		1
15#endif
16
17#ifdef FVP_MAX_CPUS_PER_CLUSTER
18#define	CPUS_PER_CLUSTER	FVP_MAX_CPUS_PER_CLUSTER
19#else
20#define	CPUS_PER_CLUSTER	8
21#endif
22
23#define CONCAT(x, y)	x##y
24#define CONC(x, y)	CONCAT(x, y)
25
26/*
27 * n - CPU number
28 * r - MPID
29 */
30#define	CPU(n, r)			\
31	CPU##n:cpu@r## {		\
32	device_type = "cpu";		\
33	compatible = "arm,armv8";	\
34	reg = <0x0 0x##r>;		\
35	enable-method = "psci";		\
36	cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;	\
37	next-level-cache = <&L2_0>;	\
38	};
39
40#if (PE_PER_CPU == 2)
41#define THREAD(n)		\
42	thread##n {		\
43		cpu = <&CONC(CPU, __COUNTER__)>;	\
44	};
45
46#define	CORE(n)			\
47	core##n {		\
48		THREAD(0)	\
49		THREAD(1)	\
50	};
51
52#else	/* PE_PER_CPU == 1 */
53#define	CORE(n)			\
54	core##n {		\
55		cpu = <&CPU##n>;\
56	};
57#endif	/* PE_PER_CORE */
58
59#if (CPUS_PER_CLUSTER == 1)
60#if (PE_PER_CPU == 1)
61#define	CPUS		\
62	CPU(0, 0)
63#else
64#define	CPUS		\
65	CPU(0, 0)	\
66	CPU(1, 1)
67#endif
68#define	CLUSTER(n)	\
69	cluster##n {	\
70		CORE(0)	\
71	};
72
73#elif (CPUS_PER_CLUSTER == 2)
74#if (PE_PER_CPU == 1)
75#define	CPUS		\
76	CPU(0, 0)	\
77	CPU(1, 100)
78#else
79#define	CPUS		\
80	CPU(0, 0)	\
81	CPU(1, 1)	\
82	CPU(2, 100)	\
83	CPU(3, 101)
84#endif
85#define	CLUSTER(n)	\
86	cluster##n {	\
87		CORE(0)	\
88		CORE(1)	\
89	};
90
91#elif (CPUS_PER_CLUSTER == 3)
92#if (PE_PER_CPU == 1)
93#define	CPUS		\
94	CPU(0, 0)	\
95	CPU(1, 100)	\
96	CPU(2, 200)
97#else
98#define	CPUS		\
99	CPU(0, 0)	\
100	CPU(1, 1)	\
101	CPU(2, 100)	\
102	CPU(3, 101)	\
103	CPU(4, 200)	\
104	CPU(5, 201)
105#endif
106#define	CLUSTER(n)	\
107	cluster##n {	\
108		CORE(0)	\
109		CORE(1)	\
110		CORE(2)	\
111	};
112
113#elif (CPUS_PER_CLUSTER == 4)
114#if (PE_PER_CPU == 1)
115#define	CPUS		\
116	CPU(0, 0)	\
117	CPU(1, 100)	\
118	CPU(2, 200)	\
119	CPU(3, 300)
120#else
121#define	CPUS		\
122	CPU(0, 0)	\
123	CPU(1, 1)	\
124	CPU(2, 100)	\
125	CPU(3, 101)	\
126	CPU(4, 200)	\
127	CPU(5, 201)	\
128	CPU(6, 300)	\
129	CPU(7, 301)
130#endif
131#define	CLUSTER(n)	\
132	cluster##n {	\
133		CORE(0)	\
134		CORE(1)	\
135		CORE(2)	\
136		CORE(3)	\
137	};
138
139#elif (CPUS_PER_CLUSTER == 5)
140#if (PE_PER_CPU == 1)
141#define	CPUS		\
142	CPU(0, 0)	\
143	CPU(1, 100)	\
144	CPU(2, 200)	\
145	CPU(3, 300)	\
146	CPU(4, 400)
147#else
148#define	CPUS		\
149	CPU(0, 0)	\
150	CPU(1, 1)	\
151	CPU(2, 100)	\
152	CPU(3, 101)	\
153	CPU(4, 200)	\
154	CPU(5, 201)	\
155	CPU(6, 300)	\
156	CPU(7, 301)	\
157	CPU(8, 400)	\
158	CPU(9, 401)
159#endif
160#define	CLUSTER(n)	\
161	cluster##n {	\
162		CORE(0)	\
163		CORE(1)	\
164		CORE(2)	\
165		CORE(3)	\
166		CORE(4)	\
167	};
168
169#elif (CPUS_PER_CLUSTER == 6)
170#if (PE_PER_CPU == 1)
171#define	CPUS		\
172	CPU(0, 0)	\
173	CPU(1, 100)	\
174	CPU(2, 200)	\
175	CPU(3, 300)	\
176	CPU(4, 400)	\
177	CPU(5, 500)
178#else
179#define	CPUS		\
180	CPU(0, 0)	\
181	CPU(1, 1)	\
182	CPU(2, 100)	\
183	CPU(3, 101)	\
184	CPU(4, 200)	\
185	CPU(5, 201)	\
186	CPU(6, 300)	\
187	CPU(7, 301)	\
188	CPU(8, 400)	\
189	CPU(9, 401)	\
190	CPU(10, 500)	\
191	CPU(11, 501)
192#endif
193#define	CLUSTER(n)	\
194	cluster##n {	\
195		CORE(0)	\
196		CORE(1)	\
197		CORE(2)	\
198		CORE(3)	\
199		CORE(4)	\
200		CORE(5)	\
201	};
202
203#elif (CPUS_PER_CLUSTER == 7)
204#if (PE_PER_CPU == 1)
205#define	CPUS		\
206	CPU(0, 0)	\
207	CPU(1, 100)	\
208	CPU(2, 200)	\
209	CPU(3, 300)	\
210	CPU(4, 400)	\
211	CPU(5, 500)	\
212	CPU(6, 600)
213#else
214#define	CPUS		\
215	CPU(0, 0)	\
216	CPU(1, 1)	\
217	CPU(2, 100)	\
218	CPU(3, 101)	\
219	CPU(4, 200)	\
220	CPU(5, 201)	\
221	CPU(6, 300)	\
222	CPU(7, 301)	\
223	CPU(8, 400)	\
224	CPU(9, 401)	\
225	CPU(10, 500)	\
226	CPU(11, 501)	\
227	CPU(12, 600)	\
228	CPU(13, 601)
229#endif
230#define	CLUSTER(n)	\
231	cluster##n {	\
232		CORE(0)	\
233		CORE(1)	\
234		CORE(2)	\
235		CORE(3)	\
236		CORE(4)	\
237		CORE(5)	\
238		CORE(6)	\
239	};
240
241#else
242#if (PE_PER_CPU == 1)
243#define	CPUS		\
244	CPU(0, 0)	\
245	CPU(1, 100)	\
246	CPU(2, 200)	\
247	CPU(3, 300)	\
248	CPU(4, 400)	\
249	CPU(5, 500)	\
250	CPU(6, 600)	\
251	CPU(7, 700)
252#else
253#define	CPUS		\
254	CPU(0, 0)	\
255	CPU(1, 1)	\
256	CPU(2, 100)	\
257	CPU(3, 101)	\
258	CPU(4, 200)	\
259	CPU(5, 201)	\
260	CPU(6, 300)	\
261	CPU(7, 301)	\
262	CPU(8, 400)	\
263	CPU(9, 401)	\
264	CPU(10, 500)	\
265	CPU(11, 501)	\
266	CPU(12, 600)	\
267	CPU(13, 601)	\
268	CPU(14, 700)	\
269	CPU(15, 701)
270#endif
271#define	CLUSTER(n)	\
272	cluster##n {	\
273		CORE(0)	\
274		CORE(1)	\
275		CORE(2)	\
276		CORE(3)	\
277		CORE(4)	\
278		CORE(5)	\
279		CORE(6)	\
280		CORE(7)	\
281	};
282#endif	/* CPUS_PER_CLUSTER */
283
284#define	CPU_MAP			\
285	cpu-map {		\
286		CLUSTER(0)	\
287	};
288
289#endif	/* FVP_DEFS_DYNAMIQ_DTSI */
290