1/*
2 * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef	FVP_DEFS_DTSI
8#define	FVP_DEFS_DTSI
9
10/* Set default topology values if not passed from platform's makefile */
11#ifndef	CLUSTER_COUNT
12#ifdef	FVP_CLUSTER_COUNT
13#define	CLUSTER_COUNT		FVP_CLUSTER_COUNT
14#else
15#define	CLUSTER_COUNT		2
16#endif
17#endif	/* CLUSTER_COUNT */
18
19#ifndef CPUS_PER_CLUSTER
20#ifdef FVP_MAX_CPUS_PER_CLUSTER
21#define	CPUS_PER_CLUSTER	FVP_MAX_CPUS_PER_CLUSTER
22#else
23#define	CPUS_PER_CLUSTER	4
24#endif
25#endif	/* CPUS_PER_CLUSTER */
26
27/* Get platform's topology */
28#define	CPUS_COUNT		(CLUSTER_COUNT * CPUS_PER_CLUSTER)
29
30#define CONCAT(x, y)	x##y
31#define CONC(x, y)	CONCAT(x, y)
32
33/* CPU's cluster */
34#define	CLS(n)	(n / CPUS_PER_CLUSTER)
35
36/* CPU's position in cluster */
37#define	POS(n)	(n % CPUS_PER_CLUSTER)
38
39#define	ADR(n, c, p)	\
40	CPU##n:cpu@CONC(c, CONC(p, AFF)) {
41
42#define	PRE			\
43	device_type = "cpu";	\
44	compatible = "arm,armv8";
45
46#ifdef	REG_32
47/* 32-bit address */
48#define	REG(c, p)	\
49	reg = <CONC(0x, CONC(c, CONC(p, AFF)))>;
50#else
51/* 64-bit address */
52#define	REG(c, p)	\
53	reg = <0x0 CONC(0x, CONC(c, CONC(p, AFF)))>;
54#endif	/* REG_32 */
55
56#define	POST				\
57	enable-method = "psci";		\
58	cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;	\
59	next-level-cache = <&L2_0>;	\
60	};
61
62#ifdef	REG_32
63#define	CPU_0		\
64	CPU0:cpu@0 {	\
65	PRE		\
66	reg = <0x0>;	\
67	POST
68#else
69#define	CPU_0		\
70	CPU0:cpu@0 {	\
71	PRE		\
72	reg = <0x0 0x0>;\
73	POST
74#endif	/* REG_32 */
75
76/*
77 * n - CPU number
78 */
79#define	CPU(n, c, p)	\
80	ADR(n, c, p)	\
81	PRE		\
82	REG(c, p)	\
83	POST
84
85/* 2 CPUs */
86#if (CPUS_COUNT > 1)
87#if (CLS(1) == 0)
88#define c1
89#define	p1	1
90#else
91#define	c1	10
92#define p1	0
93#endif
94
95#define	CPU_1	CPU(1, c1, p1)	/* CPU1: 0.1; 1.0 */
96
97/* 3 CPUs */
98#if (CPUS_COUNT > 2)
99#if (CLS(2) == 0)
100#define c2
101#define p2	2
102#elif (CLS(2) == 1)
103#define	c2	10
104#define p2	0
105#else
106#define	c2	20
107#define p2	0
108#endif
109
110#define	CPU_2	CPU(2, c2, p2)	/* CPU2: 0.2; 1.0; 2.0 */
111
112/* 4 CPUs */
113#if (CPUS_COUNT > 3)
114#if (CLS(3) == 0)
115#define c3
116#elif (CLS(3) == 1)
117#define	c3	10
118#else
119#define	c3	30
120#endif
121
122#if (POS(3) == 0)
123#define p3	0
124#elif (POS(3) == 1)
125#define	p3	1
126#else
127#define	p3	3
128#endif
129
130#define	CPU_3	CPU(3, c3, p3)	/* CPU3: 0.3; 1.0; 1.1; 3.0 */
131
132/* 6 CPUs */
133#if (CPUS_COUNT > 4)
134#if (CLS(4) == 1)
135#define	c4	10
136#else
137#define	c4	20
138#endif
139
140#if (POS(4) == 0)
141#define p4	0
142#else
143#define	p4	1
144#endif
145
146#if (CLS(5) == 1)
147#define	c5	10
148#else
149#define	c5	20
150#endif
151
152#if (POS(5) == 1)
153#define	p5	1
154#else
155#define	p5	2
156#endif
157
158#define	CPU_4	CPU(4, c4, p4)	/* CPU4: 1.0; 1.1; 2.0 */
159#define	CPU_5	CPU(5, c5, p5)	/* CPU5: 1.1; 1.2; 2.1 */
160
161/* 8 CPUs */
162#if (CPUS_COUNT > 6)
163#if (CLS(6) == 1)
164#define	c6	10
165#define	p6	2
166#elif (CLS(6) == 2)
167#define	c6	20
168#define	p6	0
169#else
170#define	c6	30
171#define	p6	0
172#endif
173
174#if (CLS(7) == 1)
175#define	c7	10
176#define	p7	3
177#elif (CLS(7) == 2)
178#define	c7	20
179#define	p7	1
180#else
181#define	c7	30
182#define	p7	1
183#endif
184
185#define	CPU_6	CPU(6, c6, p6)	/* CPU6: 1.2; 2.0; 3.0 */
186#define	CPU_7	CPU(7, c7, p7)	/* CPU7: 1.3; 2.1; 3.1 */
187
188/* 9 CPUs */
189#if (CPUS_COUNT > 8)
190#if (POS(8) == 0)
191#define	p8	0
192#else
193#define	p8	2
194#endif
195
196#define	CPU_8	CPU(8, 20, p8)	/* CPU8: 2.0; 2.2 */
197
198/* 12 CPUs */
199#if (CPUS_COUNT > 9)
200#if (CLS(9) == 2)
201#define	c9	20
202#define	p9	1
203#else
204#define	c9	30
205#define	p9	0
206#endif
207
208#if (CLS(10) == 2)
209#define	c10	20
210#define	p10	2
211#else
212#define	c10	30
213#define	p10	1
214#endif
215
216#if (CLS(11) == 2)
217#define	c11	20
218#define	p11	3
219#else
220#define	c11	30
221#define	p11	2
222#endif
223
224#define	CPU_9	CPU(9, c9, p9)		/* CPU9:  2.1; 3.0 */
225#define	CPU_10	CPU(10, c10, p10)	/* CPU10: 2.2; 3.1 */
226#define	CPU_11	CPU(11, c11, p11)	/* CPU11: 2.3; 3.2 */
227
228/* 16 CPUs */
229#if (CPUS_COUNT > 12)
230#define	CPU_12	CPU(12, 30, 0)		/* CPU12: 3.0 */
231#define	CPU_13	CPU(13, 30, 1)		/* CPU13: 3.1 */
232#define	CPU_14	CPU(14, 30, 2)		/* CPU14: 3.2 */
233#define	CPU_15	CPU(15, 30, 3)		/* CPU15: 3.3 */
234#endif	/* > 12 */
235#endif	/* > 9 */
236#endif	/* > 8 */
237#endif	/* > 6 */
238#endif	/* > 4 */
239#endif	/* > 3 */
240#endif	/* > 2 */
241#endif	/* > 1 */
242
243#if (CPUS_COUNT == 1)
244#define	CPUS	\
245	CPU_0
246
247#elif (CPUS_COUNT == 2)
248#define	CPUS	\
249	CPU_0	\
250	CPU_1
251
252#elif (CPUS_COUNT == 3)
253#define	CPUS	\
254	CPU_0	\
255	CPU_1	\
256	CPU_2
257
258#elif (CPUS_COUNT == 4)
259#define	CPUS	\
260	CPU_0	\
261	CPU_1	\
262	CPU_2	\
263	CPU_3
264
265#elif (CPUS_COUNT == 6)
266#define	CPUS	\
267	CPU_0	\
268	CPU_1	\
269	CPU_2	\
270	CPU_3	\
271	CPU_4	\
272	CPU_5
273
274#elif (CPUS_COUNT == 8)
275#define	CPUS	\
276	CPU_0	\
277	CPU_1	\
278	CPU_2	\
279	CPU_3	\
280	CPU_4	\
281	CPU_5	\
282	CPU_6	\
283	CPU_7
284
285#elif (CPUS_COUNT == 9)
286#define	CPUS	\
287	CPU_0	\
288	CPU_1	\
289	CPU_2	\
290	CPU_3	\
291	CPU_4	\
292	CPU_5	\
293	CPU_6	\
294	CPU_7	\
295	CPU_8
296
297#elif (CPUS_COUNT == 12)
298#define	CPUS	\
299	CPU_0	\
300	CPU_1	\
301	CPU_2	\
302	CPU_3	\
303	CPU_4	\
304	CPU_5	\
305	CPU_6	\
306	CPU_7	\
307	CPU_8	\
308	CPU_9	\
309	CPU_10	\
310	CPU_11
311
312#else
313#define	CPUS	\
314	CPU_0	\
315	CPU_1	\
316	CPU_2	\
317	CPU_3	\
318	CPU_4	\
319	CPU_5	\
320	CPU_6	\
321	CPU_7	\
322	CPU_8	\
323	CPU_9	\
324	CPU_10	\
325	CPU_11	\
326	CPU_12	\
327	CPU_13	\
328	CPU_14	\
329	CPU_15
330#endif	/* CPUS_COUNT */
331
332#define	CORE(n)		\
333	core##n {	\
334		cpu = <&CONC(CPU, __COUNTER__)>;	\
335	};
336
337/* Max 4 CPUs per cluster */
338#if (CPUS_PER_CLUSTER == 1)
339#define	CLUSTER(n)		\
340	cluster##n {		\
341		CORE(0)		\
342	};
343#elif (CPUS_PER_CLUSTER == 2)
344#define	CLUSTER(n)		\
345	cluster##n {		\
346		CORE(0)		\
347		CORE(1)		\
348	};
349
350#elif (CPUS_PER_CLUSTER == 3)
351#define	CLUSTER(n)		\
352	cluster##n {		\
353		CORE(0)		\
354		CORE(1)		\
355		CORE(2)		\
356	};
357
358#else
359#define	CLUSTER(n)		\
360	cluster##n {		\
361		CORE(0)		\
362		CORE(1)		\
363		CORE(2)		\
364		CORE(3)		\
365	};
366#endif	/* CPUS_PER_CLUSTER */
367
368/* Max 4 clusters */
369#if (CLUSTER_COUNT == 1)
370#define	CPU_MAP			\
371	cpu-map {		\
372		CLUSTER(0)	\
373	};
374
375#elif (CLUSTER_COUNT == 2)
376#define	CPU_MAP			\
377	cpu-map {		\
378		CLUSTER(0)	\
379		CLUSTER(1)	\
380	};
381
382#elif (CLUSTER_COUNT == 3)
383#define	CPU_MAP			\
384	cpu-map {		\
385		CLUSTER(0)	\
386		CLUSTER(1)	\
387		CLUSTER(2)	\
388	};
389
390#else
391#define	CPU_MAP			\
392	cpu-map {		\
393		CLUSTER(0)	\
394		CLUSTER(1)	\
395		CLUSTER(2)	\
396		CLUSTER(3)	\
397	};
398#endif	/* CLUSTER_COUNT */
399
400#endif	/* FVP_DEFS_DTSI */
401