1 /*
2  * Copyright 2021 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef DDR_IO_H
9 #define DDR_IO_H
10 
11 #include <endian.h>
12 
13 #include <lib/mmio.h>
14 
15 #define min(a, b)  (((a) > (b)) ? (b) : (a))
16 
17 #define max(a, b)  (((a) > (b)) ? (a) : (b))
18 
19 /* macro for memory barrier */
20 #define mb()		asm volatile("dsb sy" : : : "memory")
21 
22 #ifdef NXP_DDR_BE
23 #define ddr_in32(a)			bswap32(mmio_read_32((uintptr_t)(a)))
24 #define ddr_out32(a, v)			mmio_write_32((uintptr_t)(a),\
25 							bswap32(v))
26 #elif defined(NXP_DDR_LE)
27 #define ddr_in32(a)			mmio_read_32((uintptr_t)(a))
28 #define ddr_out32(a, v)			mmio_write_32((uintptr_t)(a), v)
29 #else
30 #error Please define CCSR DDR register endianness
31 #endif
32 
33 #define ddr_setbits32(a, v)		ddr_out32((a), ddr_in32(a) | (v))
34 #define ddr_clrbits32(a, v)		ddr_out32((a), ddr_in32(a) & ~(v))
35 #define ddr_clrsetbits32(a, c, s)	ddr_out32((a), (ddr_in32(a) & ~(c)) \
36 						  | (s))
37 
38 #endif /*	DDR_IO_H	*/
39