1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #ifndef BOARD_MARVELL_DEF_H
9 #define BOARD_MARVELL_DEF_H
10 
11 /*
12  * Required platform porting definitions common to all ARM
13  * development platforms
14  */
15 
16 /* Size of cacheable stacks */
17 #if IMAGE_BL1
18 #if TRUSTED_BOARD_BOOT
19 # define PLATFORM_STACK_SIZE 0x1000
20 #else
21 # define PLATFORM_STACK_SIZE 0x440
22 #endif
23 #elif IMAGE_BL2
24 # if TRUSTED_BOARD_BOOT
25 #  define PLATFORM_STACK_SIZE 0x1000
26 # else
27 #  define PLATFORM_STACK_SIZE 0x400
28 # endif
29 #elif IMAGE_BL31
30 # define PLATFORM_STACK_SIZE 0x400
31 #elif IMAGE_BL32
32 # define PLATFORM_STACK_SIZE 0x440
33 #endif
34 
35 /*
36  * PLAT_MARVELL_MMAP_ENTRIES depends on the number of entries in the
37  * plat_arm_mmap array defined for each BL stage.
38  */
39 #if IMAGE_BLE
40 #  define PLAT_MARVELL_MMAP_ENTRIES	3
41 #endif
42 #if IMAGE_BL1
43 #  if TRUSTED_BOARD_BOOT
44 #   define PLAT_MARVELL_MMAP_ENTRIES	7
45 #  else
46 #   define PLAT_MARVELL_MMAP_ENTRIES	6
47 #  endif	/* TRUSTED_BOARD_BOOT */
48 #endif
49 #if IMAGE_BL2
50 #  define PLAT_MARVELL_MMAP_ENTRIES		8
51 #endif
52 #if IMAGE_BL31
53 #define PLAT_MARVELL_MMAP_ENTRIES		5
54 #endif
55 
56 /*
57  * Platform specific page table and MMU setup constants
58  */
59 #if IMAGE_BL1
60 #define MAX_XLAT_TABLES			4
61 #elif IMAGE_BLE
62 #  define MAX_XLAT_TABLES		4
63 #elif IMAGE_BL2
64 #  define MAX_XLAT_TABLES		4
65 #elif IMAGE_BL31
66 # define MAX_XLAT_TABLES		4
67 #elif IMAGE_BL32
68 #  define MAX_XLAT_TABLES               4
69 #endif
70 
71 #define MAX_IO_DEVICES			3
72 #define MAX_IO_HANDLES			4
73 
74 #endif /* BOARD_MARVELL_DEF_H */
75