1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #ifndef PLAT_PM_TRACE_H
9 #define PLAT_PM_TRACE_H
10 
11 /*
12  * PM Trace is for Debug purpose only!!!
13  * It should not be enabled during System Run time
14  */
15 #undef PM_TRACE_ENABLE
16 
17 
18 /* trace entry time */
19 struct pm_trace_entry {
20 	/* trace entry time stamp */
21 	unsigned int timestamp;
22 
23 	/* trace info
24 	 * [16-31] - API Trace Id
25 	 * [00-15] - API Step Id
26 	 */
27 	unsigned int trace_info;
28 };
29 
30 struct pm_trace_ctrl {
31 	/* trace pointer - points to next free entry in trace cyclic queue */
32 	unsigned int trace_pointer;
33 
34 	/* trace count - number of entries in the queue, clear upon read */
35 	unsigned int trace_count;
36 };
37 
38 /* trace size definition */
39 #define AP_MSS_ATF_CORE_INFO_SIZE	(256)
40 #define AP_MSS_ATF_CORE_ENTRY_SIZE	(8)
41 #define AP_MSS_ATF_TRACE_SIZE_MASK	(0xFF)
42 
43 /* trace address definition */
44 #define AP_MSS_TIMER_BASE		(MVEBU_REGS_BASE_MASK + 0x580110)
45 
46 #define AP_MSS_ATF_CORE_0_CTRL_BASE	(MVEBU_REGS_BASE_MASK + 0x520140)
47 #define AP_MSS_ATF_CORE_1_CTRL_BASE	(MVEBU_REGS_BASE_MASK + 0x520150)
48 #define AP_MSS_ATF_CORE_2_CTRL_BASE	(MVEBU_REGS_BASE_MASK + 0x520160)
49 #define AP_MSS_ATF_CORE_3_CTRL_BASE	(MVEBU_REGS_BASE_MASK + 0x520170)
50 #define AP_MSS_ATF_CORE_CTRL_BASE	(AP_MSS_ATF_CORE_0_CTRL_BASE)
51 
52 #define AP_MSS_ATF_CORE_0_INFO_BASE	(MVEBU_REGS_BASE_MASK + 0x5201C0)
53 #define AP_MSS_ATF_CORE_0_INFO_TRACE	(MVEBU_REGS_BASE_MASK + 0x5201C4)
54 #define AP_MSS_ATF_CORE_1_INFO_BASE	(MVEBU_REGS_BASE_MASK + 0x5209C0)
55 #define AP_MSS_ATF_CORE_1_INFO_TRACE	(MVEBU_REGS_BASE_MASK + 0x5209C4)
56 #define AP_MSS_ATF_CORE_2_INFO_BASE	(MVEBU_REGS_BASE_MASK + 0x5211C0)
57 #define AP_MSS_ATF_CORE_2_INFO_TRACE	(MVEBU_REGS_BASE_MASK + 0x5211C4)
58 #define AP_MSS_ATF_CORE_3_INFO_BASE	(MVEBU_REGS_BASE_MASK + 0x5219C0)
59 #define AP_MSS_ATF_CORE_3_INFO_TRACE	(MVEBU_REGS_BASE_MASK + 0x5219C4)
60 #define AP_MSS_ATF_CORE_INFO_BASE	(AP_MSS_ATF_CORE_0_INFO_BASE)
61 
62 /* trace info definition */
63 #define TRACE_PWR_DOMAIN_OFF		(0x10000)
64 #define TRACE_PWR_DOMAIN_SUSPEND	(0x20000)
65 #define TRACE_PWR_DOMAIN_SUSPEND_FINISH	(0x30000)
66 #define TRACE_PWR_DOMAIN_ON		(0x40000)
67 #define TRACE_PWR_DOMAIN_ON_FINISH	(0x50000)
68 
69 #define TRACE_PWR_DOMAIN_ON_MASK	(0xFF)
70 
71 #ifdef PM_TRACE_ENABLE
72 
73 /* trace API definition */
74 void pm_core_0_trace(unsigned int trace);
75 void pm_core_1_trace(unsigned int trace);
76 void pm_core_2_trace(unsigned int trace);
77 void pm_core_3_trace(unsigned int trace);
78 
79 typedef void (*core_trace_func)(unsigned int);
80 
81 extern core_trace_func funcTbl[PLATFORM_CORE_COUNT];
82 
83 #define PM_TRACE(trace) funcTbl[plat_my_core_pos()](trace)
84 
85 #else
86 
87 #define PM_TRACE(trace)
88 
89 #endif
90 
91 /*******************************************************************************
92  * pm_trace_add
93  *
94  * DESCRIPTION: Add PM trace
95  ******************************************************************************
96  */
97 void pm_trace_add(unsigned int trace, unsigned int core);
98 
99 #endif /* PLAT_PM_TRACE_H */
100