1/* 2 * Copyright (c) 2021, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <common/bl_common.h> 10#include <neoverse_demeter.h> 11#include <cpu_macros.S> 12#include <plat_macros.S> 13 14/* Hardware handled coherency */ 15#if HW_ASSISTED_COHERENCY == 0 16#error "Neoverse Demeter must be compiled with HW_ASSISTED_COHERENCY enabled" 17#endif 18 19/* 64-bit only core */ 20#if CTX_INCLUDE_AARCH32_REGS == 1 21#error "Neoverse Demeter supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22#endif 23 24 /* ---------------------------------------------------- 25 * HW will do the cache maintenance while powering down 26 * ---------------------------------------------------- 27 */ 28func neoverse_demeter_core_pwr_dwn 29 /* --------------------------------------------------- 30 * Enable CPU power down bit in power control register 31 * --------------------------------------------------- 32 */ 33 mrs x0, NEOVERSE_DEMETER_CPUPWRCTLR_EL1 34 orr x0, x0, #NEOVERSE_DEMETER_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 35 msr NEOVERSE_DEMETER_CPUPWRCTLR_EL1, x0 36 isb 37 ret 38endfunc neoverse_demeter_core_pwr_dwn 39 40#if REPORT_ERRATA 41/* 42 * Errata printing function for Neoverse Demeter. Must follow AAPCS. 43 */ 44func neoverse_demeter_errata_report 45 ret 46endfunc neoverse_demeter_errata_report 47#endif 48 49func neoverse_demeter_reset_func 50 /* Disable speculative loads */ 51 msr SSBS, xzr 52 isb 53 ret 54endfunc neoverse_demeter_reset_func 55 56 /* --------------------------------------------- 57 * This function provides Neoverse Demeter- 58 * specific register information for crash 59 * reporting. It needs to return with x6 60 * pointing to a list of register names in ascii 61 * and x8 - x15 having values of registers to be 62 * reported. 63 * --------------------------------------------- 64 */ 65.section .rodata.neoverse_demeter_regs, "aS" 66neoverse_demeter_regs: /* The ascii list of register names to be reported */ 67 .asciz "cpuectlr_el1", "" 68 69func neoverse_demeter_cpu_reg_dump 70 adr x6, neoverse_demeter_regs 71 mrs x8, NEOVERSE_DEMETER_CPUECTLR_EL1 72 ret 73endfunc neoverse_demeter_cpu_reg_dump 74 75declare_cpu_ops neoverse_demeter, NEOVERSE_DEMETER_MIDR, \ 76 neoverse_demeter_reset_func, \ 77 neoverse_demeter_core_pwr_dwn 78