1/*
2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef PLAT_MACROS_S
8#define PLAT_MACROS_S
9
10#include <drivers/arm/gicv2.h>
11#include <platform_def.h>
12
13.section .rodata.gic_reg_name, "aS"
14
15gicc_regs:
16	.asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
17gicd_pend_reg:
18	.asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n"
19newline:
20	.asciz "\n"
21spacer:
22	.asciz ":\t\t0x"
23
24	/* ---------------------------------------------
25	 * The below required platform porting macro
26	 * prints out relevant GIC and CCI registers
27	 * whenever an unhandled exception is taken in
28	 * BL31.
29	 * Clobbers: x0 - x10, x16, x17, sp
30	 * ---------------------------------------------
31	 */
32	.macro plat_crash_print_regs
33
34	/* GICC registers */
35
36	mov_imm	x17, AML_GICC_BASE
37
38	adr	x6, gicc_regs
39	ldr	w8, [x17, #GICC_HPPIR]
40	ldr	w9, [x17, #GICC_AHPPIR]
41	ldr	w10, [x17, #GICC_CTLR]
42	bl	str_in_crash_buf_print
43
44	/* GICD registers */
45
46	mov_imm	x16, AML_GICD_BASE
47
48	add	x7, x16, #GICD_ISPENDR
49	adr	x4, gicd_pend_reg
50	bl	asm_print_str
51
52gicd_ispendr_loop:
53	sub	x4, x7, x16
54	cmp	x4, #0x280
55	b.eq	exit_print_gic_regs
56	bl	asm_print_hex
57
58	adr	x4, spacer
59	bl	asm_print_str
60
61	ldr	x4, [x7], #8
62	bl	asm_print_hex
63
64	adr	x4, newline
65	bl	asm_print_str
66	b	gicd_ispendr_loop
67exit_print_gic_regs:
68
69	.endm
70
71#endif /* PLAT_MACROS_S */
72