1# 2# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9# Use the GICv3 driver on the FVP by default 10FVP_USE_GIC_DRIVER := FVP_GICV3 11 12# Default cluster count for FVP 13FVP_CLUSTER_COUNT := 2 14 15# Default number of CPUs per cluster on FVP 16FVP_MAX_CPUS_PER_CLUSTER := 4 17 18# Default number of threads per CPU on FVP 19FVP_MAX_PE_PER_CPU := 1 20 21# Disable redistributor frame of inactive/fused CPU cores by marking it as read 22# only; enable redistributor frames of all CPU cores by default. 23FVP_GICR_REGION_PROTECTION := 0 24 25FVP_DT_PREFIX := fvp-base-gicv3-psci 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Pass FVP_GICR_REGION_PROTECTION to the build system. 40$(eval $(call add_define,FVP_GICR_REGION_PROTECTION)) 41 42# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 43# choose the CCI driver , else the CCN driver 44ifeq ($(FVP_CLUSTER_COUNT), 0) 45$(error "Incorrect cluster count specified for FVP port") 46else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 47FVP_INTERCONNECT_DRIVER := FVP_CCI 48else 49FVP_INTERCONNECT_DRIVER := FVP_CCN 50endif 51 52$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 53 54# Choose the GIC sources depending upon the how the FVP will be invoked 55ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 56 57# The GIC model (GIC-600 or GIC-500) will be detected at runtime 58GICV3_SUPPORT_GIC600 := 1 59GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 60 61# Include GICv3 driver files 62include drivers/arm/gic/v3/gicv3.mk 63 64FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 65 plat/common/plat_gicv3.c \ 66 plat/arm/common/arm_gicv3.c 67 68 ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 69 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c 70 endif 71 72else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 73 74# No GICv4 extension 75GIC_ENABLE_V4_EXTN := 0 76$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 77 78# Include GICv2 driver files 79include drivers/arm/gic/v2/gicv2.mk 80 81FVP_GIC_SOURCES := ${GICV2_SOURCES} \ 82 plat/common/plat_gicv2.c \ 83 plat/arm/common/arm_gicv2.c 84 85FVP_DT_PREFIX := fvp-base-gicv2-psci 86else 87$(error "Incorrect GIC driver chosen on FVP port") 88endif 89 90ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 91FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 92else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 93FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 94 plat/arm/common/arm_ccn.c 95else 96$(error "Incorrect CCN driver chosen on FVP port") 97endif 98 99FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 100 plat/arm/board/fvp/fvp_security.c \ 101 plat/arm/common/arm_tzc400.c 102 103 104PLAT_INCLUDES := -Iplat/arm/board/fvp/include 105 106 107PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 108 109FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 110 111ifeq (${ARCH}, aarch64) 112 113# select a different set of CPU files, depending on whether we compile for 114# hardware assisted coherency cores or not 115ifeq (${HW_ASSISTED_COHERENCY}, 0) 116# Cores used without DSU 117 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 118 lib/cpus/aarch64/cortex_a53.S \ 119 lib/cpus/aarch64/cortex_a57.S \ 120 lib/cpus/aarch64/cortex_a72.S \ 121 lib/cpus/aarch64/cortex_a73.S 122else 123# Cores used with DSU only 124 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 125 # AArch64-only cores 126 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 127 lib/cpus/aarch64/cortex_a76ae.S \ 128 lib/cpus/aarch64/cortex_a77.S \ 129 lib/cpus/aarch64/cortex_a78.S \ 130 lib/cpus/aarch64/neoverse_n_common.S \ 131 lib/cpus/aarch64/neoverse_n1.S \ 132 lib/cpus/aarch64/neoverse_n2.S \ 133 lib/cpus/aarch64/neoverse_e1.S \ 134 lib/cpus/aarch64/neoverse_v1.S \ 135 lib/cpus/aarch64/neoverse_demeter.S \ 136 lib/cpus/aarch64/cortex_a78_ae.S \ 137 lib/cpus/aarch64/cortex_a510.S \ 138 lib/cpus/aarch64/cortex_a710.S \ 139 lib/cpus/aarch64/cortex_makalu.S \ 140 lib/cpus/aarch64/cortex_makalu_elp_arm.S \ 141 lib/cpus/aarch64/cortex_a65.S \ 142 lib/cpus/aarch64/cortex_a65ae.S \ 143 lib/cpus/aarch64/cortex_a78c.S \ 144 lib/cpus/aarch64/cortex_hayes.S \ 145 lib/cpus/aarch64/cortex_hunter.S 146 endif 147 # AArch64/AArch32 cores 148 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 149 lib/cpus/aarch64/cortex_a75.S 150endif 151 152else 153FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 154endif 155 156BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 157 drivers/arm/sp805/sp805.c \ 158 drivers/delay_timer/delay_timer.c \ 159 drivers/io/io_semihosting.c \ 160 lib/semihosting/semihosting.c \ 161 lib/semihosting/${ARCH}/semihosting_call.S \ 162 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 163 plat/arm/board/fvp/fvp_bl1_setup.c \ 164 plat/arm/board/fvp/fvp_err.c \ 165 plat/arm/board/fvp/fvp_io_storage.c \ 166 ${FVP_CPU_LIBS} \ 167 ${FVP_INTERCONNECT_SOURCES} 168 169ifeq (${USE_SP804_TIMER},1) 170BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 171else 172BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 173endif 174 175 176BL2_SOURCES += drivers/arm/sp805/sp805.c \ 177 drivers/io/io_semihosting.c \ 178 lib/utils/mem_region.c \ 179 lib/semihosting/semihosting.c \ 180 lib/semihosting/${ARCH}/semihosting_call.S \ 181 plat/arm/board/fvp/fvp_bl2_setup.c \ 182 plat/arm/board/fvp/fvp_err.c \ 183 plat/arm/board/fvp/fvp_io_storage.c \ 184 plat/arm/common/arm_nor_psci_mem_protect.c \ 185 ${FVP_SECURITY_SOURCES} 186 187 188ifeq (${COT_DESC_IN_DTB},1) 189BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c 190endif 191 192ifeq (${ENABLE_RME},1) 193BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S 194endif 195 196ifeq (${BL2_AT_EL3},1) 197BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 198 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 199 ${FVP_CPU_LIBS} \ 200 ${FVP_INTERCONNECT_SOURCES} 201endif 202 203ifeq (${USE_SP804_TIMER},1) 204BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 205endif 206 207BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 208 ${FVP_SECURITY_SOURCES} 209 210ifeq (${USE_SP804_TIMER},1) 211BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 212endif 213 214BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 215 drivers/arm/smmu/smmu_v3.c \ 216 drivers/delay_timer/delay_timer.c \ 217 drivers/cfi/v2m/v2m_flash.c \ 218 lib/utils/mem_region.c \ 219 plat/arm/board/fvp/fvp_bl31_setup.c \ 220 plat/arm/board/fvp/fvp_console.c \ 221 plat/arm/board/fvp/fvp_pm.c \ 222 plat/arm/board/fvp/fvp_topology.c \ 223 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 224 plat/arm/common/arm_nor_psci_mem_protect.c \ 225 ${FVP_CPU_LIBS} \ 226 ${FVP_GIC_SOURCES} \ 227 ${FVP_INTERCONNECT_SOURCES} \ 228 ${FVP_SECURITY_SOURCES} 229 230# Support for fconf in BL31 231# Added separately from the above list for better readability 232ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) 233BL31_SOURCES += lib/fconf/fconf.c \ 234 lib/fconf/fconf_dyn_cfg_getter.c \ 235 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 236 237BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 238 239ifeq (${SEC_INT_DESC_IN_FCONF},1) 240BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c 241endif 242 243endif 244 245ifeq (${USE_SP804_TIMER},1) 246BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 247else 248BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 249endif 250 251# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 252ifdef UNIX_MK 253FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 254FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 255 ${PLAT}_fw_config.dts \ 256 ${PLAT}_tb_fw_config.dts \ 257 ${PLAT}_soc_fw_config.dts \ 258 ${PLAT}_nt_fw_config.dts \ 259 ) 260 261FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 262FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 263FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 264FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 265 266ifeq (${SPD},tspd) 267FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 268FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 269 270# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 271$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 272endif 273 274ifeq (${SPD},spmd) 275 276ifeq ($(ARM_SPMC_MANIFEST_DTS),) 277ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 278endif 279 280FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 281FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 282 283# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 284$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 285endif 286 287# Add the FW_CONFIG to FIP and specify the same to certtool 288$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG})) 289# Add the TB_FW_CONFIG to FIP and specify the same to certtool 290$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG})) 291# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 292$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG})) 293# Add the NT_FW_CONFIG to FIP and specify the same to certtool 294$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 295 296FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 297$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 298 299# Add the HW_CONFIG to FIP and specify the same to certtool 300$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) 301endif 302 303# Enable Activity Monitor Unit extensions by default 304ENABLE_AMU := 1 305 306# Enable dynamic mitigation support by default 307DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 308 309# Enable reclaiming of BL31 initialisation code for secondary cores 310# stacks for FVP. However, don't enable reclaiming for clang. 311ifneq (${RESET_TO_BL31},1) 312ifeq ($(findstring clang,$(notdir $(CC))),) 313RECLAIM_INIT_CODE := 1 314endif 315endif 316 317ifeq (${ENABLE_AMU},1) 318BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 319 lib/cpus/aarch64/cpuamu_helpers.S 320 321ifeq (${HW_ASSISTED_COHERENCY}, 1) 322BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 323 lib/cpus/aarch64/neoverse_n1_pubsub.c 324endif 325endif 326 327ifeq (${RAS_EXTENSION},1) 328BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 329endif 330 331ifneq (${ENABLE_STACK_PROTECTOR},0) 332PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 333endif 334 335ifeq (${ARCH},aarch32) 336 NEED_BL32 := yes 337endif 338 339# Enable the dynamic translation tables library. 340ifeq (${ARCH},aarch32) 341 ifeq (${RESET_TO_SP_MIN},1) 342 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 343 endif 344else # AArch64 345 ifeq (${RESET_TO_BL31},1) 346 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 347 endif 348 ifeq (${SPD},trusty) 349 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 350 endif 351endif 352 353ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 354 ifeq (${ARCH},aarch32) 355 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 356 else # AArch64 357 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 358 ifeq (${SPD},tspd) 359 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 360 endif 361 endif 362endif 363 364ifeq (${USE_DEBUGFS},1) 365 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 366endif 367 368# Add support for platform supplied linker script for BL31 build 369$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 370 371ifneq (${BL2_AT_EL3}, 0) 372 override BL1_SOURCES = 373endif 374 375include plat/arm/board/common/board_common.mk 376include plat/arm/common/arm_common.mk 377 378ifeq (${TRUSTED_BOARD_BOOT}, 1) 379BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 380BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 381 382ifeq (${MEASURED_BOOT},1) 383BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 384 plat/arm/board/fvp/fvp_bl1_measured_boot.c 385BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 386 plat/arm/board/fvp/fvp_bl2_measured_boot.c 387endif 388 389# FVP being a development platform, enable capability to disable Authentication 390# dynamically if TRUSTED_BOARD_BOOT is set. 391DYN_DISABLE_AUTH := 1 392endif 393 394# enable trace buffer control registers access to NS by default 395ENABLE_TRBE_FOR_NS := 1 396 397# enable trace system registers access to NS by default 398ENABLE_SYS_REG_TRACE_FOR_NS := 1 399 400# enable trace filter control registers access to NS by default 401ENABLE_TRF_FOR_NS := 1 402