1 /*
2 * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <arch_helpers.h>
8
9 /************************************************************
10 * For R-class everything is in secure world.
11 * Prepare the CPU system registers for first entry into EL1
12 ************************************************************/
cm_prepare_el2_exit(void)13 void cm_prepare_el2_exit(void)
14 {
15 uint64_t hcr_el2 = 0U;
16
17 /*
18 * The use of ARMv8.3 pointer authentication (PAuth) is governed
19 * by fields in HCR_EL2, which trigger a 'trap to EL2' if not
20 * enabled. This register initialized at boot up, update PAuth
21 * bits.
22 *
23 * HCR_API_BIT: Set to one to disable traps to EL2 if lower ELs
24 * access PAuth registers
25 *
26 * HCR_APK_BIT: Set to one to disable traps to EL2 if lower ELs
27 * access PAuth instructions
28 */
29 hcr_el2 = read_hcr_el2();
30 write_hcr_el2(hcr_el2 | HCR_API_BIT | HCR_APK_BIT);
31
32 /*
33 * Initialise CNTHCTL_EL2. All fields are architecturally UNKNOWN
34 * on reset and are set to zero except for field(s) listed below.
35 *
36 * CNTHCTL_EL2.EL1PCEN: Set to one to disable traps to EL2
37 * if lower ELs accesses to the physical timer registers.
38 *
39 * CNTHCTL_EL2.EL1PCTEN: Set to one to disable traps to EL2
40 * if lower ELs access to the physical counter registers.
41 */
42 write_cnthctl_el2(CNTHCTL_RESET_VAL | EL1PCEN_BIT | EL1PCTEN_BIT);
43
44 /*
45 * On Armv8-R, the EL1&0 memory system architecture is configurable
46 * as a VMSA or PMSA. All the fields architecturally UNKNOWN on reset
47 * and are set to zero except for field listed below.
48 *
49 * VCTR_EL2.MSA: Set to one to ensure the VMSA is enabled so that
50 * rich OS can boot.
51 */
52 write_vtcr_el2(VTCR_RESET_VAL | VTCR_EL2_MSA);
53 }
54