1 /*
2  * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <stdint.h>
9 #include <string.h>
10 
11 #include <lib/fconf/fconf.h>
12 #include <lib/mmio.h>
13 #include <tools_share/tbbr_oid.h>
14 
15 #include <plat/arm/common/fconf_nv_cntr_getter.h>
16 #include <plat/arm/common/plat_arm.h>
17 #include <plat/common/platform.h>
18 #include <platform_def.h>
19 
20 
21 /*
22  * Return the ROTPK hash in the following ASN.1 structure in DER format:
23  *
24  * AlgorithmIdentifier  ::=  SEQUENCE  {
25  *     algorithm	OBJECT IDENTIFIER,
26  *     parameters	ANY DEFINED BY algorithm OPTIONAL
27  * }
28  *
29  * DigestInfo ::= SEQUENCE {
30  *     digestAlgorithm	AlgorithmIdentifier,
31  *     digest		OCTET STRING
32  * }
33  */
plat_get_rotpk_info(void * cookie,void ** key_ptr,unsigned int * key_len,unsigned int * flags)34 int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
35 			unsigned int *flags)
36 {
37 	return arm_get_rotpk_info(cookie, key_ptr, key_len, flags);
38 }
39 
40 /*
41  * Store a new non-volatile counter value.
42  *
43  * On some FVP_R versions, the non-volatile counters are read-only so this
44  * function will always fail.
45  *
46  * Return: 0 = success, Otherwise = error
47  */
plat_set_nv_ctr(void * cookie,unsigned int nv_ctr)48 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr)
49 {
50 	const char *oid;
51 	uintptr_t nv_ctr_addr;
52 
53 	assert(cookie != NULL);
54 
55 	oid = (const char *)cookie;
56 	if (strcmp(oid, TRUSTED_FW_NVCOUNTER_OID) == 0) {
57 		nv_ctr_addr = FCONF_GET_PROPERTY(cot, nv_cntr_addr,
58 						TRUSTED_NV_CTR_ID);
59 	} else if (strcmp(oid, NON_TRUSTED_FW_NVCOUNTER_OID) == 0) {
60 		nv_ctr_addr = FCONF_GET_PROPERTY(cot, nv_cntr_addr,
61 						NON_TRUSTED_NV_CTR_ID);
62 	} else {
63 		return 1;
64 	}
65 
66 	mmio_write_32(nv_ctr_addr, nv_ctr);
67 
68 	/*
69 	 * If the FVP_R models a locked counter then its value cannot be updated
70 	 * and the above write operation has been silently ignored.
71 	 */
72 	return (mmio_read_32(nv_ctr_addr) == nv_ctr) ? 0 : 1;
73 }
74