1 /*
2 * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <plat/arm/common/plat_arm.h>
8
9 /******************************************************************************
10 * The power domain tree descriptor. RD-E1-Edge platform consists of two
11 * clusters with eight CPUs in each cluster. The CPUs are multi-threaded with
12 * two threads per CPU.
13 ******************************************************************************/
14 static const unsigned char rde1edge_pd_tree_desc[] = {
15 CSS_SGI_CHIP_COUNT,
16 PLAT_ARM_CLUSTER_COUNT,
17 CSS_SGI_MAX_CPUS_PER_CLUSTER * CSS_SGI_MAX_PE_PER_CPU,
18 CSS_SGI_MAX_CPUS_PER_CLUSTER * CSS_SGI_MAX_PE_PER_CPU
19 };
20
21 /******************************************************************************
22 * This function returns the topology tree information.
23 ******************************************************************************/
plat_get_power_domain_tree_desc(void)24 const unsigned char *plat_get_power_domain_tree_desc(void)
25 {
26 return rde1edge_pd_tree_desc;
27 }
28
29 /*******************************************************************************
30 * The array mapping platform core position (implemented by plat_my_core_pos())
31 * to the SCMI power domain ID implemented by SCP.
32 ******************************************************************************/
33 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
34 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
35 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
36 };
37