1# Copyright (c) 2021, Arm Limited. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6include common/fdt_wrappers.mk 7 8ifeq ($(filter ${TARGET_PLATFORM}, 0 1),) 9 $(error TARGET_PLATFORM must be 0 or 1) 10endif 11 12CSS_LOAD_SCP_IMAGES := 1 13 14CSS_USE_SCMI_SDS_DRIVER := 1 15 16RAS_EXTENSION := 0 17 18SDEI_SUPPORT := 0 19 20EL3_EXCEPTION_HANDLING := 0 21 22HANDLE_EA_EL3_FIRST := 0 23 24# System coherency is managed in hardware 25HW_ASSISTED_COHERENCY := 1 26 27# When building for systems with hardware-assisted coherency, there's no need to 28# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 29USE_COHERENT_MEM := 0 30 31GIC_ENABLE_V4_EXTN := 1 32 33# GIC-600 configuration 34GICV3_SUPPORT_GIC600 := 1 35 36# Enable SVE 37ENABLE_SVE_FOR_NS := 1 38ENABLE_SVE_FOR_SWD := 1 39 40# Include GICv3 driver files 41include drivers/arm/gic/v3/gicv3.mk 42 43ENT_GIC_SOURCES := ${GICV3_SOURCES} \ 44 plat/common/plat_gicv3.c \ 45 plat/arm/common/arm_gicv3.c 46 47override NEED_BL2U := no 48 49override ARM_PLAT_MT := 1 50 51TC_BASE = plat/arm/board/tc 52 53PLAT_INCLUDES += -I${TC_BASE}/include/ 54 55# Common CPU libraries 56TC_CPU_SOURCES := lib/cpus/aarch64/cortex_a510.S 57 58# CPU libraries for TARGET_PLATFORM=0 59ifeq (${TARGET_PLATFORM}, 0) 60TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a710.S \ 61 lib/cpus/aarch64/cortex_x2.S 62endif 63 64# CPU libraries for TARGET_PLATFORM=1 65ifeq (${TARGET_PLATFORM}, 1) 66TC_CPU_SOURCES += lib/cpus/aarch64/cortex_makalu.S \ 67 lib/cpus/aarch64/cortex_makalu_elp_arm.S 68endif 69 70INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c 71 72PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ 73 ${TC_BASE}/include/tc_helpers.S 74 75BL1_SOURCES += ${INTERCONNECT_SOURCES} \ 76 ${TC_CPU_SOURCES} \ 77 ${TC_BASE}/tc_trusted_boot.c \ 78 ${TC_BASE}/tc_err.c \ 79 drivers/arm/sbsa/sbsa.c 80 81 82BL2_SOURCES += ${TC_BASE}/tc_security.c \ 83 ${TC_BASE}/tc_err.c \ 84 ${TC_BASE}/tc_trusted_boot.c \ 85 ${TC_BASE}/tc_bl2_setup.c \ 86 lib/utils/mem_region.c \ 87 drivers/arm/tzc/tzc400.c \ 88 plat/arm/common/arm_tzc400.c \ 89 plat/arm/common/arm_nor_psci_mem_protect.c 90 91BL31_SOURCES += ${INTERCONNECT_SOURCES} \ 92 ${TC_CPU_SOURCES} \ 93 ${ENT_GIC_SOURCES} \ 94 ${TC_BASE}/tc_bl31_setup.c \ 95 ${TC_BASE}/tc_topology.c \ 96 lib/fconf/fconf.c \ 97 lib/fconf/fconf_dyn_cfg_getter.c \ 98 drivers/cfi/v2m/v2m_flash.c \ 99 lib/utils/mem_region.c \ 100 plat/arm/common/arm_nor_psci_mem_protect.c 101 102BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 103 104# Add the FDT_SOURCES and options for Dynamic Config 105FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ 106 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts 107FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 108TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 109 110# Add the FW_CONFIG to FIP and specify the same to certtool 111$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 112# Add the TB_FW_CONFIG to FIP and specify the same to certtool 113$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 114 115ifeq (${SPD},spmd) 116ifeq ($(ARM_SPMC_MANIFEST_DTS),) 117ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts 118endif 119 120FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 121TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 122 123# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 124$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) 125endif 126 127#Device tree 128TC_HW_CONFIG_DTS := fdts/tc.dts 129TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb 130FDT_SOURCES += ${TC_HW_CONFIG_DTS} 131$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) 132 133# Add the HW_CONFIG to FIP and specify the same to certtool 134$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) 135 136override CTX_INCLUDE_AARCH32_REGS := 0 137 138override CTX_INCLUDE_PAUTH_REGS := 1 139 140override ENABLE_SPE_FOR_LOWER_ELS := 0 141 142override ENABLE_AMU := 1 143override ENABLE_AMU_AUXILIARY_COUNTERS := 1 144override ENABLE_AMU_FCONF := 1 145 146override ENABLE_MPMM := 1 147override ENABLE_MPMM_FCONF := 1 148 149include plat/arm/common/arm_common.mk 150include plat/arm/css/common/css_common.mk 151include plat/arm/soc/common/soc_css.mk 152include plat/arm/board/common/board_common.mk 153