1 /*
2  * Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <common/debug.h>
10 #include <common/desc_image_load.h>
11 #include <common/fdt_wrappers.h>
12 #include <drivers/io/io_storage.h>
13 #include <lib/object_pool.h>
14 #include <libfdt.h>
15 #include <plat/arm/common/arm_fconf_getter.h>
16 #include <plat/arm/common/arm_fconf_io_storage.h>
17 #include <plat/arm/common/fconf_arm_sp_getter.h>
18 #include <platform_def.h>
19 #include <tools_share/firmware_image_package.h>
20 
21 #ifdef IMAGE_BL2
22 
23 bl_mem_params_node_t sp_mem_params_descs[MAX_SP_IDS];
24 
25 struct arm_sp_t arm_sp;
26 
fconf_populate_arm_sp(uintptr_t config)27 int fconf_populate_arm_sp(uintptr_t config)
28 {
29 	int sp_node, node, err;
30 	union uuid_helper_t uuid_helper;
31 	unsigned int index = 0;
32 	uint32_t val32;
33 	bool is_plat_owned = false;
34 	const unsigned int sip_start = SP_PKG1_ID;
35 	unsigned int sip_index = sip_start;
36 	const unsigned int sip_end = sip_start + MAX_SP_IDS / 2;
37 	const unsigned int plat_start = SP_PKG5_ID;
38 	unsigned int plat_index = plat_start;
39 	const unsigned int plat_end = plat_start + MAX_SP_IDS / 2;
40 
41 	/* As libfdt use void *, we can't avoid this cast */
42 	const void *dtb = (void *)config;
43 
44 	/* Assert the node offset point to "arm,sp" compatible property */
45 	const char *compatible_str = "arm,sp";
46 
47 	node = fdt_node_offset_by_compatible(dtb, -1, compatible_str);
48 	if (node < 0) {
49 		ERROR("FCONF: Can't find %s in dtb\n", compatible_str);
50 		return node;
51 	}
52 
53 	fdt_for_each_subnode(sp_node, dtb, node) {
54 		if ((index == MAX_SP_IDS) || (sip_index == sip_end)
55 		    || (plat_index == plat_end)) {
56 			ERROR("FCONF: Reached max number of SPs\n");
57 			return -1;
58 		}
59 
60 		/* Read UUID */
61 		err = fdtw_read_uuid(dtb, sp_node, "uuid", 16,
62 				     (uint8_t *)&uuid_helper);
63 		if (err < 0) {
64 			ERROR("FCONF: cannot read SP uuid\n");
65 			return -1;
66 		}
67 
68 		arm_sp.uuids[index] = uuid_helper;
69 
70 		/* Read Load address */
71 		err = fdt_read_uint32(dtb, sp_node, "load-address", &val32);
72 		if (err < 0) {
73 			ERROR("FCONF: cannot read SP load address\n");
74 			return -1;
75 		}
76 		arm_sp.load_addr[index] = val32;
77 
78 		VERBOSE("FCONF: %s UUID"
79 			" %02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x"
80 			" load_addr=%lx\n",
81 			__func__,
82 			uuid_helper.uuid_struct.time_low[0], uuid_helper.uuid_struct.time_low[1],
83 			uuid_helper.uuid_struct.time_low[2], uuid_helper.uuid_struct.time_low[3],
84 			uuid_helper.uuid_struct.time_mid[0], uuid_helper.uuid_struct.time_mid[1],
85 			uuid_helper.uuid_struct.time_hi_and_version[0],
86 			uuid_helper.uuid_struct.time_hi_and_version[1],
87 			uuid_helper.uuid_struct.clock_seq_hi_and_reserved,
88 			uuid_helper.uuid_struct.clock_seq_low,
89 			uuid_helper.uuid_struct.node[0], uuid_helper.uuid_struct.node[1],
90 			uuid_helper.uuid_struct.node[2], uuid_helper.uuid_struct.node[3],
91 			uuid_helper.uuid_struct.node[4], uuid_helper.uuid_struct.node[5],
92 			arm_sp.load_addr[index]);
93 
94 		/* Read owner field only for dualroot CoT */
95 #if defined(ARM_COT_dualroot)
96 		/* Owner is an optional field, no need to catch error */
97 		fdtw_read_string(dtb, sp_node, "owner",
98 				arm_sp.owner[index], ARM_SP_OWNER_NAME_LEN);
99 #endif
100 		/* If owner is empty mark it as SiP owned */
101 		if ((strncmp(arm_sp.owner[index], "SiP",
102 			     ARM_SP_OWNER_NAME_LEN) == 0) ||
103 		    (strncmp(arm_sp.owner[index], "",
104 			     ARM_SP_OWNER_NAME_LEN) == 0)) {
105 			is_plat_owned = false;
106 		} else if (strcmp(arm_sp.owner[index], "Plat") == 0) {
107 			is_plat_owned = true;
108 		} else {
109 			ERROR("FCONF: %s is not a valid SP owner\n",
110 			      arm_sp.owner[index]);
111 			return -1;
112 		}
113 		/*
114 		 * Add SP information in mem param descriptor and IO policies
115 		 * structure.
116 		 */
117 		if (is_plat_owned) {
118 			sp_mem_params_descs[index].image_id = plat_index;
119 			policies[plat_index].image_spec =
120 						(uintptr_t)&arm_sp.uuids[index];
121 			policies[plat_index].dev_handle = &fip_dev_handle;
122 			policies[plat_index].check = open_fip;
123 			plat_index++;
124 		} else {
125 			sp_mem_params_descs[index].image_id = sip_index;
126 			policies[sip_index].image_spec =
127 						(uintptr_t)&arm_sp.uuids[index];
128 			policies[sip_index].dev_handle = &fip_dev_handle;
129 			policies[sip_index].check = open_fip;
130 			sip_index++;
131 		}
132 		SET_PARAM_HEAD(&sp_mem_params_descs[index].image_info,
133 					PARAM_IMAGE_BINARY, VERSION_2, 0);
134 		sp_mem_params_descs[index].image_info.image_max_size =
135 							ARM_SP_MAX_SIZE;
136 		sp_mem_params_descs[index].next_handoff_image_id =
137 							INVALID_IMAGE_ID;
138 		sp_mem_params_descs[index].image_info.image_base =
139 							arm_sp.load_addr[index];
140 		index++;
141 	}
142 
143 	if ((sp_node < 0) && (sp_node != -FDT_ERR_NOTFOUND)) {
144 		ERROR("%u: fdt_for_each_subnode(): %d\n", __LINE__, node);
145 		return sp_node;
146 	}
147 
148 	arm_sp.number_of_sp = index;
149 	return 0;
150 }
151 
152 FCONF_REGISTER_POPULATOR(TB_FW, arm_sp, fconf_populate_arm_sp);
153 
154 #endif /* IMAGE_BL2 */
155