1 /*
2  * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef SGI_DMC620_TZC_REGIONS_H
8 #define SGI_DMC620_TZC_REGIONS_H
9 
10 #include <drivers/arm/tzc_dmc620.h>
11 
12 #if SPM_MM
13 #define CSS_SGI_DMC620_TZC_REGIONS_DEF				\
14 	{							\
15 		.region_base = ARM_AP_TZC_DRAM1_BASE,		\
16 		.region_top = PLAT_SP_IMAGE_NS_BUF_BASE - 1,	\
17 		.sec_attr = TZC_DMC620_REGION_S_RDWR		\
18 	}, {							\
19 		.region_base = PLAT_SP_IMAGE_NS_BUF_BASE,	\
20 		.region_top = PLAT_ARM_SP_IMAGE_STACK_BASE - 1,	\
21 		.sec_attr = TZC_DMC620_REGION_S_NS_RDWR		\
22 	}, {							\
23 		.region_base = PLAT_ARM_SP_IMAGE_STACK_BASE,	\
24 		.region_top = ARM_AP_TZC_DRAM1_END,		\
25 		.sec_attr = TZC_DMC620_REGION_S_RDWR		\
26 	}
27 #else
28 #define CSS_SGI_DMC620_TZC_REGIONS_DEF				\
29 	{							\
30 		.region_base = ARM_AP_TZC_DRAM1_BASE,		\
31 		.region_top = ARM_AP_TZC_DRAM1_END,		\
32 		.sec_attr = TZC_DMC620_REGION_S_RDWR		\
33 	}
34 #endif /* SPM_MM */
35 
36 #endif /* SGI_DMC620_TZC_REGIONS_H */
37