1 /* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/debug.h> 8 #include <drivers/arm/tzc_dmc500.h> 9 #include <plat/arm/common/plat_arm.h> 10 #include <plat/arm/soc/common/soc_css.h> 11 12 #include <sgm_variant.h> 13 14 /* Is populated with the DMC-500 controllers base addresses */ 15 static tzc_dmc500_driver_data_t plat_driver_data; 16 plat_sgm_dp_security_setup(void)17void plat_sgm_dp_security_setup(void) 18 { 19 unsigned int nprot_nsaid; 20 21 /* 22 * At reset the Mali display processors start with NSAIDs set to zero 23 * so the firmware must set them up to the expected values for ARM sgm 24 * platforms. 25 */ 26 27 nprot_nsaid = mmio_read_32(MALI_DP_BASE + DP_NPROT_NSAID_OFFSET); 28 nprot_nsaid &= ~((0xF << W_NPROT_NSAID_SHIFT) | 29 (0xF << LS_NPORT_NSAID_SHIFT)); 30 nprot_nsaid |= ((TZC_NSAID_DISP1 << W_NPROT_NSAID_SHIFT) | 31 (TZC_NSAID_DISP0 << LS_NPORT_NSAID_SHIFT)); 32 mmio_write_32(MALI_DP_BASE + DP_NPROT_NSAID_OFFSET, nprot_nsaid); 33 } 34 plat_arm_security_setup(void)35void plat_arm_security_setup(void) 36 { 37 unsigned int i; 38 unsigned int part_num = GET_PLAT_PART_NUM; 39 40 INFO("part_num: 0x%x\n", part_num); 41 42 /* 43 * Initialise plat_driver_data with platform specific DMC_BASE 44 * addresses 45 */ 46 switch (part_num) { 47 case SGM775_SSC_VER_PART_NUM: 48 for (i = 0; i < SGM775_DMC_COUNT; i++) 49 plat_driver_data.dmc_base[i] = PLAT_ARM_TZC_BASE 50 + SGM_DMC_SIZE * i; 51 plat_driver_data.dmc_count = SGM775_DMC_COUNT; 52 break; 53 default: 54 /* Unexpected platform */ 55 ERROR("Unexpected platform\n"); 56 panic(); 57 } 58 /* Initialize the TrustZone Controller in DMC-500 */ 59 arm_tzc_dmc500_setup(&plat_driver_data, NULL); 60 61 /* Do DP NSAID setup */ 62 plat_sgm_dp_security_setup(); 63 /* Do ARM CSS SoC security setup */ 64 soc_css_security_setup(); 65 } 66