1 /* 2 * Copyright (c) 2019-2020, Broadcom 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #include <stdint.h> 7 8 #include <plat_brcm.h> 9 #include <platform_def.h> 10 11 /* 12 * On Stingray, the system power level is the highest power level. 13 * The first entry in the power domain descriptor specifies the 14 * number of system power domains i.e. 1. 15 */ 16 #define SR_PWR_DOMAINS_AT_MAX_PWR_LVL 1 17 18 /* 19 * The Stingray power domain tree descriptor. The cluster power domains 20 * are arranged so that when the PSCI generic code creates the power 21 * domain tree, the indices of the CPU power domain nodes it allocates 22 * match the linear indices returned by plat_core_pos_by_mpidr() 23 * i.e. CLUSTER0 CPUs are allocated indices from 0 to 1 and the higher 24 * indices for other Cluster CPUs. 25 */ 26 const unsigned char sr_power_domain_tree_desc[] = { 27 /* No of root nodes */ 28 SR_PWR_DOMAINS_AT_MAX_PWR_LVL, 29 /* No of children for the root node */ 30 BRCM_CLUSTER_COUNT, 31 /* No of children for the first cluster node */ 32 PLATFORM_CLUSTER0_CORE_COUNT, 33 /* No of children for the second cluster node */ 34 PLATFORM_CLUSTER1_CORE_COUNT, 35 /* No of children for the third cluster node */ 36 PLATFORM_CLUSTER2_CORE_COUNT, 37 /* No of children for the fourth cluster node */ 38 PLATFORM_CLUSTER3_CORE_COUNT, 39 }; 40 41 /******************************************************************************* 42 * This function returns the Stingray topology tree information. 43 ******************************************************************************/ plat_get_power_domain_tree_desc(void)44const unsigned char *plat_get_power_domain_tree_desc(void) 45 { 46 return sr_power_domain_tree_desc; 47 } 48 plat_core_pos_by_mpidr(u_register_t mpidr)49int plat_core_pos_by_mpidr(u_register_t mpidr) 50 { 51 return plat_brcm_calc_core_pos(mpidr); 52 } 53