1/* 2 * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <assert_macros.S> 10#include <platform_def.h> 11 12 .local platform_normal_stacks 13 .weak plat_get_my_stack 14 .weak plat_set_my_stack 15 16 /* --------------------------------------------------------------------- 17 * When the compatibility layer is disabled, the platform APIs 18 * plat_get_my_stack() and plat_set_my_stack() are supported by the 19 * platform and the previous APIs platform_get_stack() and 20 * platform_set_stack() are defined in terms of new APIs making use of 21 * the fact that they are only ever invoked for the current CPU. This 22 * is to enable components of Trusted Firmware like SPDs using the old 23 * platform APIs to continue to work. 24 * -------------------------------------------------------------------- 25 */ 26 27 /* ----------------------------------------------------- 28 * uintptr_t plat_get_my_stack () 29 * 30 * For the current CPU, this function returns the stack 31 * pointer for a stack allocated in device memory. 32 * ----------------------------------------------------- 33 */ 34func plat_get_my_stack 35 mov x10, x30 36 get_my_mp_stack platform_normal_stacks, PLATFORM_STACK_SIZE 37 ret x10 38endfunc plat_get_my_stack 39 40 /* ----------------------------------------------------- 41 * void plat_set_my_stack () 42 * 43 * For the current CPU, this function sets the stack 44 * pointer to a stack allocated in normal memory. 45 * ----------------------------------------------------- 46 */ 47func plat_set_my_stack 48 mov x9, x30 49 bl plat_get_my_stack 50 mov sp, x0 51 ret x9 52endfunc plat_set_my_stack 53 54 /* ----------------------------------------------------- 55 * Per-CPU stacks in normal memory. Each CPU gets a 56 * stack of PLATFORM_STACK_SIZE bytes. 57 * ----------------------------------------------------- 58 */ 59declare_stack platform_normal_stacks, tzfw_normal_stacks, \ 60 PLATFORM_STACK_SIZE, PLATFORM_CORE_COUNT, \ 61 CACHE_WRITEBACK_GRANULE 62