1#
2# Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Non-TF Boot ROM
8BL2_AT_EL3	:=	1
9
10# On Hikey, the TSP can execute from TZC secure area in DRAM (default)
11# or SRAM.
12HIKEY_TSP_RAM_LOCATION	?=	dram
13ifeq (${HIKEY_TSP_RAM_LOCATION}, dram)
14  HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID
15else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram)
16  HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID
17else
18  $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value")
19endif
20
21CONSOLE_BASE			:=	PL011_UART3_BASE
22CRASH_CONSOLE_BASE		:=	PL011_UART3_BASE
23PLAT_PARTITION_MAX_ENTRIES	:=	12
24PLAT_PL061_MAX_GPIOS		:=	160
25COLD_BOOT_SINGLE_CPU		:=	1
26PROGRAMMABLE_RESET_ADDRESS	:=	1
27ENABLE_SVE_FOR_NS		:=	0
28
29# Process flags
30$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID))
31$(eval $(call add_define,CONSOLE_BASE))
32$(eval $(call add_define,CRASH_CONSOLE_BASE))
33$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
34$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES))
35
36# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
37# in the FIP if the platform requires.
38ifneq ($(BL32_EXTRA1),)
39$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
40endif
41ifneq ($(BL32_EXTRA2),)
42$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
43endif
44
45USE_COHERENT_MEM	:=	1
46
47PLAT_INCLUDES		:=	-Iplat/hisilicon/hikey/include
48
49PLAT_BL_COMMON_SOURCES	:=	drivers/arm/pl011/aarch64/pl011_console.S \
50				lib/xlat_tables/aarch64/xlat_tables.c	\
51				lib/xlat_tables/xlat_tables_common.c	\
52				plat/hisilicon/hikey/aarch64/hikey_common.c
53
54BL1_SOURCES		+=	bl1/tbbr/tbbr_img_desc.c		\
55				drivers/arm/pl061/pl061_gpio.c		\
56				drivers/arm/sp804/sp804_delay_timer.c	\
57				drivers/delay_timer/delay_timer.c	\
58				drivers/gpio/gpio.c			\
59				drivers/io/io_block.c			\
60				drivers/io/io_fip.c			\
61				drivers/io/io_storage.c			\
62				drivers/mmc/mmc.c			\
63				drivers/synopsys/emmc/dw_mmc.c		\
64				lib/cpus/aarch64/cortex_a53.S		\
65				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
66				plat/hisilicon/hikey/hikey_bl1_setup.c	\
67				plat/hisilicon/hikey/hikey_bl_common.c	\
68				plat/hisilicon/hikey/hikey_io_storage.c
69
70BL2_SOURCES		+=	common/desc_image_load.c		\
71				drivers/arm/pl061/pl061_gpio.c		\
72				drivers/arm/sp804/sp804_delay_timer.c	\
73				drivers/delay_timer/delay_timer.c	\
74				drivers/gpio/gpio.c			\
75				drivers/io/io_block.c			\
76				drivers/io/io_fip.c			\
77				drivers/io/io_storage.c			\
78				drivers/mmc/mmc.c			\
79				drivers/partition/gpt.c			\
80				drivers/partition/partition.c		\
81				drivers/synopsys/emmc/dw_mmc.c		\
82				lib/cpus/aarch64/cortex_a53.S		\
83				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
84				plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \
85				plat/hisilicon/hikey/hikey_bl2_setup.c	\
86				plat/hisilicon/hikey/hikey_bl_common.c	\
87				plat/hisilicon/hikey/hikey_security.c   \
88				plat/hisilicon/hikey/hikey_ddr.c	\
89				plat/hisilicon/hikey/hikey_image_load.c \
90				plat/hisilicon/hikey/hikey_io_storage.c	\
91				plat/hisilicon/hikey/hisi_dvfs.c	\
92				plat/hisilicon/hikey/hisi_mcu.c
93
94ifeq (${SPD},opteed)
95BL2_SOURCES		+=	lib/optee/optee_utils.c
96endif
97
98HIKEY_GIC_SOURCES	:=	drivers/arm/gic/common/gic_common.c	\
99				drivers/arm/gic/v2/gicv2_main.c		\
100				drivers/arm/gic/v2/gicv2_helpers.c	\
101				plat/common/plat_gicv2.c
102
103BL31_SOURCES		+=	drivers/arm/cci/cci.c			\
104				drivers/arm/sp804/sp804_delay_timer.c	\
105				drivers/delay_timer/delay_timer.c	\
106				lib/cpus/aarch64/cortex_a53.S		\
107				plat/common/plat_psci_common.c	\
108				plat/hisilicon/hikey/aarch64/hikey_helpers.S \
109				plat/hisilicon/hikey/hikey_bl31_setup.c	\
110				plat/hisilicon/hikey/hikey_pm.c		\
111				plat/hisilicon/hikey/hikey_topology.c	\
112				plat/hisilicon/hikey/hisi_ipc.c		\
113				plat/hisilicon/hikey/hisi_pwrc.c	\
114				plat/hisilicon/hikey/hisi_pwrc_sram.S	\
115				${HIKEY_GIC_SOURCES}
116ifeq (${ENABLE_PMF}, 1)
117BL31_SOURCES		+=	plat/hisilicon/hikey/hisi_sip_svc.c			\
118				lib/pmf/pmf_smc.c
119endif
120
121ifneq (${TRUSTED_BOARD_BOOT},0)
122
123include drivers/auth/mbedtls/mbedtls_crypto.mk
124include drivers/auth/mbedtls/mbedtls_x509.mk
125
126AUTH_SOURCES		:=	drivers/auth/auth_mod.c			\
127				drivers/auth/crypto_mod.c		\
128				drivers/auth/img_parser_mod.c		\
129				drivers/auth/tbbr/tbbr_cot_common.c
130
131BL1_SOURCES		+=	${AUTH_SOURCES}				\
132				plat/common/tbbr/plat_tbbr.c		\
133				plat/hisilicon/hikey/hikey_tbbr.c	\
134				plat/hisilicon/hikey/hikey_rotpk.S	\
135				drivers/auth/tbbr/tbbr_cot_bl1.c
136
137BL2_SOURCES		+=	${AUTH_SOURCES}				\
138				plat/common/tbbr/plat_tbbr.c		\
139				plat/hisilicon/hikey/hikey_tbbr.c	\
140				plat/hisilicon/hikey/hikey_rotpk.S	\
141				drivers/auth/tbbr/tbbr_cot_bl2.c
142
143ROT_KEY		=	$(BUILD_PLAT)/rot_key.pem
144ROTPK_HASH		=	$(BUILD_PLAT)/rotpk_sha256.bin
145
146$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
147$(BUILD_PLAT)/bl1/hikey_rotpk.o: $(ROTPK_HASH)
148$(BUILD_PLAT)/bl2/hikey_rotpk.o: $(ROTPK_HASH)
149
150certificates: $(ROT_KEY)
151$(ROT_KEY): | $(BUILD_PLAT)
152	@echo "  OPENSSL $@"
153	$(Q)openssl genrsa 2048 > $@ 2>/dev/null
154
155$(ROTPK_HASH): $(ROT_KEY)
156	@echo "  OPENSSL $@"
157	$(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
158	openssl dgst -sha256 -binary > $@ 2>/dev/null
159endif
160
161# Enable workarounds for selected Cortex-A53 errata.
162ERRATA_A53_836870		:=	1
163ERRATA_A53_843419		:=	1
164ERRATA_A53_855873		:=	1
165
166WORKAROUND_CVE_2017_5715	:=	0
167
168FIP_ALIGN			:=	512
169