1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #ifndef PHY_PORTING_LAYER_H
9 #define PHY_PORTING_LAYER_H
10 
11 #define MAX_LANE_NR		6
12 
13 static const struct xfi_params
14 	xfi_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
15 	/* AP0 */
16 	{
17 		/* CP 0 */
18 		{
19 			{ 0 }, /* Comphy0 */
20 			{ 0 }, /* Comphy1 */
21 			{ .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
22 			  .align90 = 0x5f,
23 			  .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
24 			  .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
25 			  .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
26 			  .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
27 			  .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
28 			  .valid = 0x1 }, /* Comphy2 */
29 			{ 0 }, /* Comphy3 */
30 			{ .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
31 			  .align90 = 0x5f,
32 			  .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
33 			  .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
34 			  .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
35 			  .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
36 			  .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
37 			  .valid = 0x1 }, /* Comphy4 */
38 			{ 0 }, /* Comphy5 */
39 		},
40 
41 		/* CP 1 */
42 		{
43 			{ 0 }, /* Comphy0 */
44 			{ 0 }, /* Comphy1 */
45 			{ .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
46 			  .align90 = 0x5f,
47 			  .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
48 			  .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
49 			  .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
50 			  .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
51 			  .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
52 			  .valid = 0x1 }, /* Comphy2 */
53 			{ 0 }, /* Comphy3 */
54 			{ .g1_ffe_res_sel = 0x3, .g1_ffe_cap_sel = 0xf,
55 			  .align90 = 0x5f,
56 			  .g1_dfe_res = 0x2, .g1_amp = 0x1c, .g1_emph = 0xe,
57 			  .g1_emph_en = 0x1, .g1_tx_amp_adj = 0x1,
58 			  .g1_tx_emph_en = 0x1, .g1_tx_emph = 0x0,
59 			  .g1_rx_selmuff = 0x1, .g1_rx_selmufi = 0x0,
60 			  .g1_rx_selmupf = 0x2, .g1_rx_selmupi = 0x2,
61 			  .valid = 0x1 }, /* Comphy4 */
62 			{ 0 }, /* Comphy5 */
63 		},
64 	},
65 };
66 
67 static const struct sata_params
68 	sata_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
69 	/* AP0 */
70 	{
71 		/* CP 0 */
72 		{
73 			{ 0 }, /* Comphy0 */
74 			{ .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e,
75 			  .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe,
76 			  .g1_emph_en = 0x1, .g2_emph_en = 0x1,
77 			  .g3_emph_en = 0x1,
78 			  .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1,
79 			  .g3_tx_amp_adj = 0x1,
80 			  .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0,
81 			  .g3_tx_emph_en = 0x0,
82 			  .g1_tx_emph = 0x1, .g2_tx_emph = 0x1,
83 			  .g3_tx_emph = 0x1,
84 			  .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4,
85 			  .g3_ffe_cap_sel = 0xf,
86 			  .align90 = 0x61,
87 			  .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3,
88 			  .g3_rx_selmuff = 0x3,
89 			  .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0,
90 			  .g3_rx_selmufi = 0x3,
91 			  .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1,
92 			  .g3_rx_selmupf = 0x2,
93 			  .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0,
94 			  .g3_rx_selmupi = 0x2,
95 			  .polarity_invert = COMPHY_POLARITY_NO_INVERT,
96 			  .valid = 0x1
97 			}, /* Comphy1 */
98 			{ 0 }, /* Comphy2 */
99 			{ .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e,
100 			 .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe,
101 			 .g1_emph_en = 0x1, .g2_emph_en = 0x1,
102 			 .g3_emph_en = 0x1,
103 			 .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1,
104 			 .g3_tx_amp_adj = 0x1,
105 			 .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0,
106 			 .g3_tx_emph_en = 0x0,
107 			 .g1_tx_emph = 0x1, .g2_tx_emph = 0x1,
108 			 .g3_tx_emph = 0x1,
109 			 .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4,
110 			 .g3_ffe_cap_sel = 0xf,
111 			 .align90 = 0x61,
112 			 .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3,
113 			 .g3_rx_selmuff = 0x3,
114 			 .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0,
115 			 .g3_rx_selmufi = 0x3,
116 			 .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1,
117 			 .g3_rx_selmupf = 0x2,
118 			 .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0,
119 			 .g3_rx_selmupi = 0x2,
120 			 .polarity_invert = COMPHY_POLARITY_NO_INVERT,
121 			 .valid = 0x1
122 			}, /* Comphy3 */
123 			{ 0 }, /* Comphy4 */
124 			{ 0 }, /* Comphy5 */
125 		},
126 
127 		/* CP 1 */
128 		{
129 			{ 0 }, /* Comphy0 */
130 			{ .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e,
131 			  .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe,
132 			  .g1_emph_en = 0x1, .g2_emph_en = 0x1,
133 			  .g3_emph_en = 0x1,
134 			  .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1,
135 			  .g3_tx_amp_adj = 0x1,
136 			  .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0,
137 			  .g3_tx_emph_en = 0x0,
138 			  .g1_tx_emph = 0x1, .g2_tx_emph = 0x1,
139 			  .g3_tx_emph = 0x1,
140 			  .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4,
141 			  .g3_ffe_cap_sel = 0xf,
142 			  .align90 = 0x61,
143 			  .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3,
144 			  .g3_rx_selmuff = 0x3,
145 			  .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0,
146 			  .g3_rx_selmufi = 0x3,
147 			  .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1,
148 			  .g3_rx_selmupf = 0x2,
149 			  .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0,
150 			  .g3_rx_selmupi = 0x2,
151 			  .polarity_invert = COMPHY_POLARITY_NO_INVERT,
152 			  .valid = 0x1
153 			}, /* Comphy1 */
154 			{ 0 }, /* Comphy2 */
155 			{ .g1_amp = 0x8, .g2_amp = 0xa, .g3_amp = 0x1e,
156 			  .g1_emph = 0x1, .g2_emph = 0x2, .g3_emph = 0xe,
157 			  .g1_emph_en = 0x1, .g2_emph_en = 0x1,
158 			  .g3_emph_en = 0x1,
159 			  .g1_tx_amp_adj = 0x1, .g2_tx_amp_adj = 0x1,
160 			  .g3_tx_amp_adj = 0x1,
161 			  .g1_tx_emph_en = 0x0, .g2_tx_emph_en = 0x0,
162 			  .g3_tx_emph_en = 0x0,
163 			  .g1_tx_emph = 0x1, .g2_tx_emph = 0x1,
164 			  .g3_tx_emph = 0x1,
165 			  .g3_dfe_res = 0x1, .g3_ffe_res_sel = 0x4,
166 			  .g3_ffe_cap_sel = 0xf,
167 			  .align90 = 0x61,
168 			  .g1_rx_selmuff = 0x3, .g2_rx_selmuff = 0x3,
169 			  .g3_rx_selmuff = 0x3,
170 			  .g1_rx_selmufi = 0x0, .g2_rx_selmufi = 0x0,
171 			  .g3_rx_selmufi = 0x3,
172 			  .g1_rx_selmupf = 0x1, .g2_rx_selmupf = 0x1,
173 			  .g3_rx_selmupf = 0x2,
174 			  .g1_rx_selmupi = 0x0, .g2_rx_selmupi = 0x0,
175 			  .g3_rx_selmupi = 0x2,
176 			  .polarity_invert = COMPHY_POLARITY_NO_INVERT,
177 			  .valid = 0x1
178 			}, /* Comphy3 */
179 			{ 0 }, /* Comphy4 */
180 			{ 0 }, /* Comphy5 */
181 
182 		},
183 	},
184 };
185 
186 static const struct usb_params
187 	usb_static_values_tab[AP_NUM][CP_NUM][MAX_LANE_NR] = {
188 	[0 ... AP_NUM-1][0 ... CP_NUM-1][0 ... MAX_LANE_NR-1] = {
189 		.polarity_invert = COMPHY_POLARITY_NO_INVERT
190 	},
191 };
192 #endif /* PHY_PORTING_LAYER_H */
193