1/*
2 * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#include <arch.h>
7#include <asm_macros.S>
8#include <platform_def.h>
9
10	.globl	plat_secondary_cold_boot_setup
11	.globl	plat_report_exception
12	.globl	platform_is_primary_cpu
13	.globl	plat_crash_console_init
14	.globl	plat_crash_console_putc
15	.globl	plat_crash_console_flush
16	.globl	platform_mem_init
17
18
19	.macro crash_ram_log
20	 /*
21	 * Check teearg->atf_log_buf_size.
22	 * Exit if atf_log_buf_size equals 0
23	 */
24	adr	x2, ptr_atf_crash_flag
25	ldr	x2, [x2]
26	/* exit if ptr_atf_crash_flag equals NULL */
27	cbz x2, exit_putc
28
29	/*
30	 * set atf crash magic number
31	 */
321:
33	adr	x2, ptr_atf_crash_flag
34	ldr	x2, [x2]
35	mov_imm x1, 0xdead1abf
36	/* p_atf_log_ctrl->atf_crash_flag = 0xdead1abf */
37	str	w1, [x2]
38	/* can't use w3 return addr, w4, start of buffer addr */
39	ldr	w2, [x2]
40	cmp	w2, w1
41	b.ne	1b
42
43	/*
44	 * get cpu id
45	 */
46	mrs	x1, mpidr_el1
47	/* refer to platform_get_core_pos */
48	and	x2, x1, #MPIDR_CPU_MASK
49	and	x1, x1, #MPIDR_CLUSTER_MASK
50	/* x1 = cpu id (cpu id = aff0 + aff1*4 ) */
51	add	x1, x2, x1, LSR #6
52
53	adr	x2, ptr_atf_except_write_pos_per_cpu
54	ldr	x2, [x2]
55	/*
56	 * plus (cpu_id * 8)-->
57	 * &p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id]
58	 * x2 = &p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id];
59	 */
60	add x2, x2, x1, LSL # 3
61	/* log write */
62	/* w1 = p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id] */
63	ldr	x1, [x2]
64	/* *x1 = w0-->
65	 *  *(p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id]) = c)
66	 */
67	strb	w0, [x1]
68	/* w1++ */
69	add	x1, x1, #1
70	/* p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id] = w1 */
71	str	x1, [x2]
72exit_putc:
73	.endm
74
75	/* -----------------------------------------------------
76	 * void plat_secondary_cold_boot_setup (void);
77	 *
78	 * This function performs any platform specific actions
79	 * needed for a secondary cpu after a cold reset e.g
80	 * mark the cpu's presence, mechanism to place it in a
81	 * holding pen etc.
82	 * -----------------------------------------------------
83	 */
84func plat_secondary_cold_boot_setup
85	/* Do not do cold boot for secondary CPU */
86cb_panic:
87	b	cb_panic
88endfunc plat_secondary_cold_boot_setup
89
90func platform_is_primary_cpu
91	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
92	cmp	x0, #PLAT_PRIMARY_CPU
93	cset	x0, eq
94	ret
95endfunc platform_is_primary_cpu
96
97	/* ---------------------------------------------
98	 * int plat_crash_console_init(void)
99	 * Function to initialize the crash console
100	 * without a C Runtime to print crash report.
101	 * Clobber list : x0, x1, x2
102	 * ---------------------------------------------
103	 */
104func plat_crash_console_init
105	mov_imm	x0, UART0_BASE
106	mov_imm	x1, UART_CLOCK
107	mov_imm	x2, UART_BAUDRATE
108	b	console_init
109	ret
110endfunc plat_crash_console_init
111
112	/* ---------------------------------------------
113	 * int plat_crash_console_putc(void)
114	 * Function to print a character on the crash
115	 * console without a C Runtime.
116	 * Clobber list : x1, x2
117	 * ---------------------------------------------
118	 */
119func plat_crash_console_putc
120	mov_imm x1, UART0_BASE
121	b	console_core_putc
122	ret
123endfunc plat_crash_console_putc
124
125	/* ---------------------------------------------
126	 * void plat_crash_console_flush(int c)
127	 * Function to force a write of all buffered
128	 * data that hasn't been output.
129	 * Out : void.
130	 * Clobber list : x0, x1
131	 * ---------------------------------------------
132	 */
133func plat_crash_console_flush
134	mov_imm	x0, UART0_BASE
135	b	console_core_flush
136endfunc plat_crash_console_flush
137
138	/* --------------------------------------------------------
139	 * void platform_mem_init (void);
140	 *
141	 * Any memory init, relocation to be done before the
142	 * platform boots. Called very early in the boot process.
143	 * --------------------------------------------------------
144	 */
145func platform_mem_init
146	ret
147endfunc platform_mem_init
148
149