1/*
2 * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#include <arch.h>
7#include <asm_macros.S>
8#include <mt8173_def.h>
9
10	.globl	plat_secondary_cold_boot_setup
11	.globl	plat_report_exception
12	.globl	platform_is_primary_cpu
13	.globl  plat_my_core_pos
14
15	/* -----------------------------------------------------
16	 * void plat_secondary_cold_boot_setup (void);
17	 *
18	 * This function performs any platform specific actions
19	 * needed for a secondary cpu after a cold reset e.g
20	 * mark the cpu's presence, mechanism to place it in a
21	 * holding pen etc.
22	 * -----------------------------------------------------
23	 */
24func plat_secondary_cold_boot_setup
25	/* MT8173 Oak does not do cold boot for secondary CPU */
26cb_panic:
27	b	cb_panic
28endfunc plat_secondary_cold_boot_setup
29
30func platform_is_primary_cpu
31	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
32	cmp	x0, #MT8173_PRIMARY_CPU
33	cset	x0, eq
34	ret
35endfunc platform_is_primary_cpu
36
37	/* -----------------------------------------------------
38	 * unsigned int plat_my_core_pos(void);
39	 *
40	 * result: CorePos = CoreId + (ClusterId << 2)
41	 * -----------------------------------------------------
42	 */
43func plat_my_core_pos
44	mrs     x0, mpidr_el1
45	and     x1, x0, #MPIDR_CPU_MASK
46	and     x0, x0, #MPIDR_CLUSTER_MASK
47	add     x0, x1, x0, LSR #6
48	ret
49endfunc plat_my_core_pos
50