1 /* 2 * Copyright (c) 2021, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <cdefs.h> 8 #include <common/debug.h> 9 10 #include <lib/mmio.h> 11 #include <lib/utils_def.h> 12 #include <mt_mcdi.h> 13 14 /* Read/Write */ 15 #define APMCU_MCUPM_MBOX_AP_READY U(0) 16 #define APMCU_MCUPM_MBOX_RESERVED_1 U(1) 17 #define APMCU_MCUPM_MBOX_RESERVED_2 U(2) 18 #define APMCU_MCUPM_MBOX_RESERVED_3 U(3) 19 #define APMCU_MCUPM_MBOX_PWR_CTRL_EN U(4) 20 #define APMCU_MCUPM_MBOX_L3_CACHE_MODE U(5) 21 #define APMCU_MCUPM_MBOX_BUCK_MODE U(6) 22 #define APMCU_MCUPM_MBOX_ARMPLL_MODE U(7) 23 /* Read only */ 24 #define APMCU_MCUPM_MBOX_TASK_STA U(8) 25 #define APMCU_MCUPM_MBOX_RESERVED_9 U(9) 26 #define APMCU_MCUPM_MBOX_RESERVED_10 U(10) 27 #define APMCU_MCUPM_MBOX_RESERVED_11 U(11) 28 29 /* CPC mode - Read/Write */ 30 #define APMCU_MCUPM_MBOX_WAKEUP_CPU U(12) 31 32 /* Mbox Slot: APMCU_MCUPM_MBOX_PWR_CTRL_EN */ 33 #define MCUPM_MCUSYS_CTRL BIT(0) 34 #define MCUPM_BUCK_CTRL BIT(1) 35 #define MCUPM_ARMPLL_CTRL BIT(2) 36 #define MCUPM_CM_CTRL BIT(3) 37 #define MCUPM_PWR_CTRL_MASK GENMASK(3, 0) 38 39 /* Mbox Slot: APMCU_MCUPM_MBOX_BUCK_MODE */ 40 #define MCUPM_BUCK_NORMAL_MODE U(0) /* default */ 41 #define MCUPM_BUCK_LP_MODE U(1) 42 #define MCUPM_BUCK_OFF_MODE U(2) 43 #define NF_MCUPM_BUCK_MODE U(3) 44 45 /* Mbox Slot: APMCU_MCUPM_MBOX_ARMPLL_MODE */ 46 #define MCUPM_ARMPLL_ON U(0) /* default */ 47 #define MCUPM_ARMPLL_GATING U(1) 48 #define MCUPM_ARMPLL_OFF U(2) 49 #define NF_MCUPM_ARMPLL_MODE U(3) 50 51 /* Mbox Slot: APMCU_MCUPM_MBOX_TASK_STA */ 52 #define MCUPM_TASK_UNINIT U(0) 53 #define MCUPM_TASK_INIT U(1) 54 #define MCUPM_TASK_INIT_FINISH U(2) 55 #define MCUPM_TASK_WAIT U(3) 56 #define MCUPM_TASK_RUN U(4) 57 #define MCUPM_TASK_PAUSE U(5) 58 59 #define SSPM_MBOX_3_BASE U(0x0c55fce0) 60 61 #define MCDI_NOT_INIT 0 62 #define MCDI_INIT_1 1 63 #define MCDI_INIT_2 2 64 #define MCDI_INIT_DONE 3 65 66 static int mcdi_init_status __section("tzfw_coherent_mem"); 67 mcdi_mbox_read(uint32_t id)68static inline uint32_t mcdi_mbox_read(uint32_t id) 69 { 70 return mmio_read_32(SSPM_MBOX_3_BASE + (id << 2)); 71 } 72 mcdi_mbox_write(uint32_t id,uint32_t val)73static inline void mcdi_mbox_write(uint32_t id, uint32_t val) 74 { 75 mmio_write_32(SSPM_MBOX_3_BASE + (id << 2), val); 76 } 77 mtk_mcupm_pwr_ctrl_setting(uint32_t dev)78static void mtk_mcupm_pwr_ctrl_setting(uint32_t dev) 79 { 80 mcdi_mbox_write(APMCU_MCUPM_MBOX_PWR_CTRL_EN, dev); 81 } 82 mtk_set_mcupm_pll_mode(uint32_t mode)83static void mtk_set_mcupm_pll_mode(uint32_t mode) 84 { 85 if (mode < NF_MCUPM_ARMPLL_MODE) { 86 mcdi_mbox_write(APMCU_MCUPM_MBOX_ARMPLL_MODE, mode); 87 } 88 } 89 mtk_set_mcupm_buck_mode(uint32_t mode)90static void mtk_set_mcupm_buck_mode(uint32_t mode) 91 { 92 if (mode < NF_MCUPM_BUCK_MODE) { 93 mcdi_mbox_write(APMCU_MCUPM_MBOX_BUCK_MODE, mode); 94 } 95 } 96 mtk_mcupm_is_ready(void)97static int mtk_mcupm_is_ready(void) 98 { 99 unsigned int sta = mcdi_mbox_read(APMCU_MCUPM_MBOX_TASK_STA); 100 101 return (sta == MCUPM_TASK_WAIT) || (sta == MCUPM_TASK_INIT_FINISH); 102 } 103 mcdi_init_1(void)104static int mcdi_init_1(void) 105 { 106 unsigned int sta = mcdi_mbox_read(APMCU_MCUPM_MBOX_TASK_STA); 107 108 if (sta != MCUPM_TASK_INIT) { 109 return -1; 110 } 111 112 mtk_set_mcupm_pll_mode(MCUPM_ARMPLL_OFF); 113 mtk_set_mcupm_buck_mode(MCUPM_BUCK_OFF_MODE); 114 115 mtk_mcupm_pwr_ctrl_setting( 116 MCUPM_MCUSYS_CTRL | 117 MCUPM_BUCK_CTRL | 118 MCUPM_ARMPLL_CTRL); 119 120 mcdi_mbox_write(APMCU_MCUPM_MBOX_AP_READY, 1); 121 122 return 0; 123 } 124 mcdi_init_2(void)125static int mcdi_init_2(void) 126 { 127 return mtk_mcupm_is_ready() ? 0 : -1; 128 } 129 mcdi_try_init(void)130int mcdi_try_init(void) 131 { 132 if (mcdi_init_status == MCDI_INIT_DONE) { 133 return 0; 134 } 135 136 if (mcdi_init_status == MCDI_NOT_INIT) { 137 mcdi_init_status = MCDI_INIT_1; 138 } 139 140 if (mcdi_init_status == MCDI_INIT_1 && mcdi_init_1() == 0) { 141 mcdi_init_status = MCDI_INIT_2; 142 } 143 144 if (mcdi_init_status == MCDI_INIT_2 && mcdi_init_2() == 0) { 145 mcdi_init_status = MCDI_INIT_DONE; 146 } 147 148 INFO("mcdi ready for mcusys-off-idle and system suspend\n"); 149 150 return (mcdi_init_status == MCDI_INIT_DONE) ? 0 : mcdi_init_status; 151 } 152