1/*
2 * Copyright 2018-2021 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9
10#include <platform_def.h>
11
12.globl	plat_secondary_cold_boot_setup
13.globl	plat_is_my_cpu_primary
14.globl	plat_reset_handler
15.globl  platform_mem_init
16
17func platform_mem1_init
18	ret
19endfunc platform_mem1_init
20
21func platform_mem_init
22	ret
23endfunc	platform_mem_init
24
25func apply_platform_errata
26	ret
27endfunc apply_platform_errata
28
29func plat_reset_handler
30	mov	x29, x30
31	bl	apply_platform_errata
32
33#if defined(IMAGE_BL31)
34	ldr	x0, =POLICY_SMMU_PAGESZ_64K
35	cbz	x0, 1f
36	/* Set the SMMU page size in the sACR register */
37	bl	_set_smmu_pagesz_64
38#endif
391:
40	mov	x30, x29
41	ret
42endfunc plat_reset_handler
43
44/*
45 * void plat_secondary_cold_boot_setup (void);
46 *
47 * This function performs any platform specific actions
48 * needed for a secondary cpu after a cold reset e.g
49 * mark the cpu's presence, mechanism to place it in a
50 * holding pen etc.
51 */
52func plat_secondary_cold_boot_setup
53	/* ls1028a does not do cold boot for secondary CPU */
54cb_panic:
55	b	cb_panic
56endfunc plat_secondary_cold_boot_setup
57
58/*
59 * unsigned int plat_is_my_cpu_primary (void);
60 *
61 * Find out whether the current cpu is the primary
62 * cpu.
63 */
64func plat_is_my_cpu_primary
65	mrs	x0, mpidr_el1
66	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
67	cmp	x0, 0x0
68	cset	w0, eq
69	ret
70endfunc plat_is_my_cpu_primary
71