1#
2# Copyright (c) 2019-2021, Linaro Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include common/fdt_wrappers.mk
8
9CRASH_REPORTING	:=	1
10
11include lib/libfdt/libfdt.mk
12
13ifeq (${SPM_MM},1)
14NEED_BL32		:=	yes
15EL3_EXCEPTION_HANDLING	:=	1
16GICV2_G0_FOR_EL3	:=	1
17endif
18
19# Enable new version of image loading on QEMU platforms
20LOAD_IMAGE_V2		:=	1
21
22ifeq ($(NEED_BL32),yes)
23$(eval $(call add_define,QEMU_LOAD_BL32))
24endif
25
26PLAT_QEMU_PATH		:=	plat/qemu/qemu_sbsa
27PLAT_QEMU_COMMON_PATH	:=	plat/qemu/common
28PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
29				-I${PLAT_QEMU_COMMON_PATH}/include		\
30				-I${PLAT_QEMU_PATH}/include			\
31				-Iinclude/common/tbbr
32
33PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/${ARCH}
34
35PLAT_BL_COMMON_SOURCES	:=	${PLAT_QEMU_COMMON_PATH}/qemu_common.c		\
36				${PLAT_QEMU_COMMON_PATH}/qemu_console.c		\
37				drivers/arm/pl011/${ARCH}/pl011_console.S
38
39include lib/xlat_tables_v2/xlat_tables.mk
40PLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}
41
42BL1_SOURCES		+=	drivers/io/io_semihosting.c			\
43				drivers/io/io_storage.c				\
44				drivers/io/io_fip.c				\
45				drivers/io/io_memmap.c				\
46				lib/semihosting/semihosting.c			\
47				lib/semihosting/${ARCH}/semihosting_call.S	\
48				${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c	\
49				${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S	\
50				${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c
51
52BL1_SOURCES		+=	lib/cpus/aarch64/cortex_a57.S			\
53				lib/cpus/aarch64/cortex_a72.S			\
54				lib/cpus/aarch64/qemu_max.S			\
55
56BL2_SOURCES		+=	drivers/io/io_semihosting.c			\
57				drivers/io/io_storage.c				\
58				drivers/io/io_fip.c				\
59				drivers/io/io_memmap.c				\
60				lib/semihosting/semihosting.c			\
61				lib/semihosting/${ARCH}/semihosting_call.S	\
62				${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c	\
63				${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S	\
64				${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c	\
65				common/fdt_fixup.c				\
66				$(LIBFDT_SRCS)
67ifeq (${LOAD_IMAGE_V2},1)
68BL2_SOURCES		+=	${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c	\
69				${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c		\
70				common/desc_image_load.c
71endif
72
73# Include GICv3 driver files
74include drivers/arm/gic/v3/gicv3.mk
75
76QEMU_GIC_SOURCES	:=	${GICV3_SOURCES}				\
77				plat/common/plat_gicv3.c			\
78				${PLAT_QEMU_COMMON_PATH}/qemu_gicv3.c
79
80BL31_SOURCES		+=	lib/cpus/aarch64/cortex_a57.S			\
81				lib/cpus/aarch64/cortex_a72.S			\
82				lib/cpus/aarch64/qemu_max.S			\
83				lib/semihosting/semihosting.c			\
84				lib/semihosting/${ARCH}/semihosting_call.S	\
85				plat/common/plat_psci_common.c			\
86				${PLAT_QEMU_PATH}/sbsa_pm.c			\
87				${PLAT_QEMU_PATH}/sbsa_topology.c		\
88				${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S	\
89				${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c	\
90				common/fdt_fixup.c				\
91				${QEMU_GIC_SOURCES}
92
93BL31_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
94
95ifeq (${SPM_MM},1)
96	BL31_SOURCES		+=	${PLAT_QEMU_COMMON_PATH}/qemu_spm.c
97endif
98
99SEPARATE_CODE_AND_RODATA	:= 1
100ENABLE_STACK_PROTECTOR		:= 0
101ifneq ($(ENABLE_STACK_PROTECTOR), 0)
102	PLAT_BL_COMMON_SOURCES	+=	${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
103endif
104
105MULTI_CONSOLE_API	:= 1
106
107# Disable the PSCI platform compatibility layer
108ENABLE_PLAT_COMPAT	:= 0
109
110# Use known base for UEFI if not given from command line
111# By default BL33 is at FLASH1 base
112PRELOADED_BL33_BASE	?= 0x10000000
113
114# Qemu SBSA plafrom only support SEC_SRAM
115BL32_RAM_LOCATION_ID	= SEC_SRAM_ID
116$(eval $(call add_define,BL32_RAM_LOCATION_ID))
117
118# Don't have the Linux kernel as a BL33 image by default
119ARM_LINUX_KERNEL_AS_BL33	:=	0
120$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
121$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
122
123ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
124$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
125
126# Do not enable SVE
127ENABLE_SVE_FOR_NS	:= 0
128