1 /*
2 * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <platform_def.h>
10
11 #include <common/bl_common.h>
12 #include <common/debug.h>
13 #include <common/desc_image_load.h>
14 #include <drivers/console.h>
15 #include <drivers/generic_delay_timer.h>
16 #include <drivers/ti/uart/uart_16550.h>
17 #include <lib/mmio.h>
18 #include <plat_private.h>
19 #include <plat/common/platform.h>
20
21 static entry_point_info_t bl32_ep_info;
22 static entry_point_info_t bl33_ep_info;
23
24 /*******************************************************************************
25 * Return a pointer to the 'entry_point_info' structure of the next image for
26 * the security state specified. BL33 corresponds to the non-secure image type
27 * while BL32 corresponds to the secure image type. A NULL pointer is returned
28 * if the image does not exist.
29 ******************************************************************************/
bl31_plat_get_next_image_ep_info(uint32_t type)30 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
31 {
32 entry_point_info_t *next_image_info;
33
34 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
35 assert(next_image_info->h.type == PARAM_EP);
36
37 /* None of the images on this platform can have 0x0 as the entrypoint */
38 if (next_image_info->pc)
39 return next_image_info;
40 else
41 return NULL;
42 }
43
44 #pragma weak params_early_setup
params_early_setup(u_register_t plat_param_from_bl2)45 void params_early_setup(u_register_t plat_param_from_bl2)
46 {
47 }
48
49 /*******************************************************************************
50 * Perform any BL3-1 early platform setup. Here is an opportunity to copy
51 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before they
52 * are lost (potentially). This needs to be done before the MMU is initialized
53 * so that the memory layout can be used while creating page tables.
54 * BL2 has flushed this information to memory, so we are guaranteed to pick up
55 * good data.
56 ******************************************************************************/
bl31_early_platform_setup2(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)57 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
58 u_register_t arg2, u_register_t arg3)
59 {
60 static console_t console;
61
62 params_early_setup(arg1);
63
64 if (rockchip_get_uart_base() != 0)
65 console_16550_register(rockchip_get_uart_base(),
66 rockchip_get_uart_clock(),
67 rockchip_get_uart_baudrate(), &console);
68
69 VERBOSE("bl31_setup\n");
70
71 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
72 }
73
74 /*******************************************************************************
75 * Perform any BL3-1 platform setup code
76 ******************************************************************************/
bl31_platform_setup(void)77 void bl31_platform_setup(void)
78 {
79 generic_delay_timer_init();
80 plat_rockchip_soc_init();
81
82 /* Initialize the gic cpu and distributor interfaces */
83 plat_rockchip_gic_driver_init();
84 plat_rockchip_gic_init();
85 plat_rockchip_pmu_init();
86 }
87
88 /*******************************************************************************
89 * Perform the very early platform specific architectural setup here. At the
90 * moment this is only intializes the mmu in a quick and dirty way.
91 ******************************************************************************/
bl31_plat_arch_setup(void)92 void bl31_plat_arch_setup(void)
93 {
94 plat_cci_init();
95 plat_cci_enable();
96 plat_configure_mmu_el3(BL_CODE_BASE,
97 BL_COHERENT_RAM_END - BL_CODE_BASE,
98 BL_CODE_BASE,
99 BL_CODE_END,
100 BL_COHERENT_RAM_BASE,
101 BL_COHERENT_RAM_END);
102 }
103