1/*
2 * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __ROCKCHIP_PLAT_LD_S__
8#define __ROCKCHIP_PLAT_LD_S__
9
10MEMORY {
11    PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
12}
13
14SECTIONS
15{
16	. = PMUSRAM_BASE;
17
18	/*
19	 * pmu_cpuson_entrypoint request address
20	 * align 64K when resume, so put it in the
21	 * start of pmusram
22	 */
23	.pmusram : {
24		ASSERT(. == ALIGN(64 * 1024),
25			".pmusram.entry request 64K aligned.");
26		KEEP(*(.pmusram.entry))
27
28		__bl31_pmusram_text_start = .;
29		*(.pmusram.text)
30		*(.pmusram.rodata)
31		__bl31_pmusram_text_end = .;
32		__bl31_pmusram_data_start = .;
33		*(.pmusram.data)
34		__bl31_pmusram_data_end = .;
35	} >PMUSRAM
36}
37
38#endif /* __ROCKCHIP_PLAT_LD_S__ */
39