1 /* 2 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef UNIPHIER_CONSOLE_H 8 #define UNIPHIER_CONSOLE_H 9 10 #define UNIPHIER_UART_RX 0x00 /* In: Receive buffer */ 11 #define UNIPHIER_UART_TX 0x00 /* Out: Transmit buffer */ 12 13 #define UNIPHIER_UART_FCR 0x0c /* Char/FIFO Control Register */ 14 #define UNIPHIER_UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ 15 16 #define UNIPHIER_UART_LCR_MCR 0x10 /* Line/Modem Control Register */ 17 #define UNIPHIER_UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ 18 #define UNIPHIER_UART_LSR 0x14 /* Line Status Register */ 19 #define UNIPHIER_UART_LSR_TEMT 0x40 /* Transmitter empty */ 20 #define UNIPHIER_UART_LSR_TEMT_BIT 6 /* Transmitter empty */ 21 #define UNIPHIER_UART_LSR_THRE_BIT 5 /* Transmit-hold-register empty */ 22 #define UNIPHIER_UART_LSR_DR_BIT 0 /* Receiver data ready */ 23 #define UNIPHIER_UART_DLR 0x24 /* Divisor Latch Register */ 24 25 #endif /* UNIPHIER_CONSOLE_H */ 26