1 /* 2 * Copyright (C) 2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef STM32MP1_FIP_DEF_H 8 #define STM32MP1_FIP_DEF_H 9 10 #define STM32MP_DDR_S_SIZE U(0x01E00000) /* 30 MB */ 11 #define STM32MP_DDR_SHMEM_SIZE U(0x00200000) /* 2 MB */ 12 13 #define STM32MP_BL2_SIZE U(0x0001B000) /* 108 KB for BL2 */ 14 #define STM32MP_BL2_DTB_SIZE U(0x00006000) /* 24 KB for DTB */ 15 #define STM32MP_BL32_SIZE U(0x00019000) /* 100 KB for BL32 */ 16 #define STM32MP_BL32_DTB_SIZE U(0x00005000) /* 20 KB for DTB */ 17 #define STM32MP_FW_CONFIG_MAX_SIZE PAGE_SIZE /* 4 KB for FCONF DTB */ 18 #define STM32MP_HW_CONFIG_MAX_SIZE U(0x40000) /* 256 KB for HW config DTB */ 19 20 #define STM32MP_BL2_BASE (STM32MP_SEC_SYSRAM_BASE + \ 21 STM32MP_SEC_SYSRAM_SIZE - \ 22 STM32MP_BL2_SIZE) 23 24 #define STM32MP_BL2_DTB_BASE (STM32MP_BL2_BASE - \ 25 STM32MP_BL2_DTB_SIZE) 26 27 #define STM32MP_BL32_DTB_BASE STM32MP_SYSRAM_BASE 28 29 #define STM32MP_BL32_BASE (STM32MP_BL32_DTB_BASE + \ 30 STM32MP_BL32_DTB_SIZE) 31 32 33 #if defined(IMAGE_BL2) 34 #define STM32MP_DTB_SIZE STM32MP_BL2_DTB_SIZE 35 #define STM32MP_DTB_BASE STM32MP_BL2_DTB_BASE 36 #endif 37 #if defined(IMAGE_BL32) 38 #define STM32MP_DTB_SIZE STM32MP_BL32_DTB_SIZE 39 #define STM32MP_DTB_BASE STM32MP_BL32_DTB_BASE 40 #endif 41 42 #ifdef AARCH32_SP_OPTEE 43 #define STM32MP_OPTEE_BASE STM32MP_SEC_SYSRAM_BASE 44 45 #define STM32MP_OPTEE_SIZE (STM32MP_BL2_DTB_BASE - \ 46 STM32MP_OPTEE_BASE) 47 #endif 48 49 #define STM32MP_FW_CONFIG_BASE (STM32MP_SYSRAM_BASE + \ 50 STM32MP_SYSRAM_SIZE - \ 51 PAGE_SIZE) 52 #define STM32MP_HW_CONFIG_BASE (STM32MP_BL33_BASE + \ 53 STM32MP_BL33_MAX_SIZE) 54 55 /* 56 * MAX_MMAP_REGIONS is usually: 57 * BL stm32mp1_mmap size + mmap regions in *_plat_arch_setup 58 */ 59 #if defined(IMAGE_BL32) 60 #define MAX_MMAP_REGIONS 10 61 #endif 62 63 /******************************************************************************* 64 * STM32MP1 RAW partition offset for MTD devices 65 ******************************************************************************/ 66 #define STM32MP_NOR_FIP_OFFSET U(0x00080000) 67 #define STM32MP_NAND_FIP_OFFSET U(0x00200000) 68 69 #endif /* STM32MP1_FIP_DEF_H */ 70