1 /*
2  * Copyright (c) 2019-2020, Xilinx, Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef PM_API_SYS_H
8 #define PM_API_SYS_H
9 
10 #include <stdint.h>
11 #include "pm_defs.h"
12 
13 /**********************************************************
14  * PM API function declarations
15  **********************************************************/
16 
17 enum pm_ret_status pm_get_api_version(unsigned int *version, uint32_t flag);
18 enum pm_ret_status pm_init_finalize(uint32_t flag);
19 enum pm_ret_status pm_self_suspend(uint32_t nid,
20 				   unsigned int latency,
21 				   unsigned int state,
22 				   uintptr_t address, uint32_t flag);
23 enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason, uint32_t flag);
24 enum pm_ret_status pm_req_suspend(uint32_t target,
25 				  uint8_t ack,
26 				  unsigned int latency,
27 				  unsigned int state, uint32_t flag);
28 enum pm_ret_status pm_req_wakeup(uint32_t target, uint32_t set_address,
29 				 uintptr_t address, uint8_t ack, uint32_t flag);
30 enum pm_ret_status pm_set_wakeup_source(uint32_t target, uint32_t device_id,
31 					uint8_t enable, uint32_t flag);
32 enum pm_ret_status pm_request_device(uint32_t device_id, uint32_t capabilities,
33 				     uint32_t qos, uint32_t ack, uint32_t flag);
34 enum pm_ret_status pm_release_device(uint32_t device_id, uint32_t flag);
35 enum pm_ret_status pm_set_requirement(uint32_t device_id, uint32_t capabilities,
36 				      uint32_t latency, uint32_t qos,
37 				      uint32_t flag);
38 enum pm_ret_status pm_get_device_status(uint32_t device_id, uint32_t *response,
39 					uint32_t flag);
40 enum pm_ret_status pm_reset_assert(uint32_t reset, bool assert, uint32_t flag);
41 enum pm_ret_status pm_reset_get_status(uint32_t reset, uint32_t *status,
42 				       uint32_t flag);
43 void pm_get_callbackdata(uint32_t *data, size_t count, uint32_t flag);
44 enum pm_ret_status pm_pinctrl_request(uint32_t pin, uint32_t flag);
45 enum pm_ret_status pm_pinctrl_release(uint32_t pin, uint32_t flag);
46 enum pm_ret_status pm_pinctrl_set_function(uint32_t pin, uint32_t function,
47 					   uint32_t flag);
48 enum pm_ret_status pm_pinctrl_get_function(uint32_t pin, uint32_t *function,
49 					   uint32_t flag);
50 enum pm_ret_status pm_pinctrl_set_pin_param(uint32_t pin, uint32_t param,
51 					    uint32_t value, uint32_t flag);
52 enum pm_ret_status pm_pinctrl_get_pin_param(uint32_t pin, uint32_t param,
53 					    uint32_t *value, uint32_t flag);
54 enum pm_ret_status pm_clock_enable(uint32_t clk_id, uint32_t flag);
55 enum pm_ret_status pm_clock_disable(uint32_t clk_id, uint32_t flag);
56 enum pm_ret_status pm_clock_get_state(uint32_t clk_id, uint32_t *state,
57 				      uint32_t flag);
58 enum pm_ret_status pm_clock_set_divider(uint32_t clk_id, uint32_t divider,
59 					uint32_t flag);
60 enum pm_ret_status pm_clock_get_divider(uint32_t clk_id, uint32_t *divider,
61 					uint32_t flag);
62 enum pm_ret_status pm_clock_set_parent(uint32_t clk_id, uint32_t parent,
63 				       uint32_t flag);
64 enum pm_ret_status pm_clock_get_parent(uint32_t clk_id, uint32_t *parent,
65 				       uint32_t flag);
66 enum pm_ret_status pm_clock_get_rate(uint32_t clk_id, uint32_t *clk_rate,
67 				     uint32_t flag);
68 enum pm_ret_status pm_pll_set_param(uint32_t clk_id, uint32_t param,
69 				    uint32_t value, uint32_t flag);
70 enum pm_ret_status pm_pll_get_param(uint32_t clk_id, uint32_t param,
71 				    uint32_t *value, uint32_t flag);
72 enum pm_ret_status pm_pll_set_mode(uint32_t clk_id, uint32_t mode,
73 				   uint32_t flag);
74 enum pm_ret_status pm_pll_get_mode(uint32_t clk_id, uint32_t *mode,
75 				   uint32_t flag);
76 enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack,
77 				      uint32_t flag);
78 enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype,
79 				      uint32_t flag);
80 enum pm_ret_status pm_api_ioctl(uint32_t device_id, uint32_t ioctl_id,
81 				uint32_t arg1, uint32_t arg2, uint32_t *value,
82 				uint32_t flag);
83 enum pm_ret_status pm_query_data(uint32_t qid, uint32_t arg1, uint32_t arg2,
84 				 uint32_t arg3, uint32_t *data, uint32_t flag);
85 unsigned int pm_get_shutdown_scope(void);
86 enum pm_ret_status pm_get_chipid(uint32_t *value, uint32_t flag);
87 enum pm_ret_status pm_feature_check(uint32_t api_id, unsigned int *version,
88 				    uint32_t flag);
89 enum pm_ret_status pm_load_pdi(uint32_t src, uint32_t address_low,
90 			       uint32_t address_high, uint32_t flag);
91 enum pm_ret_status pm_get_op_characteristic(uint32_t device_id,
92 					    enum pm_opchar_type type,
93 					    uint32_t *result, uint32_t flag);
94 enum pm_ret_status pm_set_max_latency(uint32_t device_id, uint32_t latency,
95 				      uint32_t flag);
96 enum pm_ret_status pm_register_notifier(uint32_t device_id, uint32_t event,
97 					uint32_t wake, uint32_t enable,
98 					uint32_t flag);
99 #endif /* PM_API_SYS_H */
100