1 /*
2 * Copyright (c) 2019, Xilinx, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 /*
8 * Versal IPI agent registers access management
9 */
10
11 #include <errno.h>
12 #include <ipi.h>
13 #include <plat_ipi.h>
14 #include <plat_private.h>
15 #include <string.h>
16 #include <common/debug.h>
17 #include <common/runtime_svc.h>
18 #include <lib/bakery_lock.h>
19 #include <lib/mmio.h>
20
21 /* versal ipi configuration table */
22 const static struct ipi_config versal_ipi_table[] = {
23 /* A72 IPI */
24 [IPI_ID_APU] = {
25 .ipi_bit_mask = IPI0_TRIG_BIT,
26 .ipi_reg_base = IPI0_REG_BASE,
27 .secure_only = 0,
28 },
29
30 /* PMC IPI */
31 [IPI_ID_PMC] = {
32 .ipi_bit_mask = PMC_IPI_TRIG_BIT,
33 .ipi_reg_base = IPI0_REG_BASE,
34 .secure_only = 0,
35 },
36
37 /* RPU0 IPI */
38 [IPI_ID_RPU0] = {
39 .ipi_bit_mask = IPI1_TRIG_BIT,
40 .ipi_reg_base = IPI1_REG_BASE,
41 .secure_only = 0,
42 },
43
44 /* RPU1 IPI */
45 [IPI_ID_RPU1] = {
46 .ipi_bit_mask = IPI2_TRIG_BIT,
47 .ipi_reg_base = IPI2_REG_BASE,
48 .secure_only = 0,
49 },
50
51 /* IPI3 IPI */
52 [IPI_ID_3] = {
53 .ipi_bit_mask = IPI3_TRIG_BIT,
54 .ipi_reg_base = IPI3_REG_BASE,
55 .secure_only = 0,
56 },
57
58 /* IPI4 IPI */
59 [IPI_ID_4] = {
60 .ipi_bit_mask = IPI4_TRIG_BIT,
61 .ipi_reg_base = IPI4_REG_BASE,
62 .secure_only = 0,
63 },
64
65 /* IPI5 IPI */
66 [IPI_ID_5] = {
67 .ipi_bit_mask = IPI5_TRIG_BIT,
68 .ipi_reg_base = IPI5_REG_BASE,
69 .secure_only = 0,
70 },
71 };
72
73 /* versal_ipi_config_table_init() - Initialize versal IPI configuration data
74 *
75 * @ipi_config_table - IPI configuration table
76 * @ipi_total - Total number of IPI available
77 *
78 */
versal_ipi_config_table_init(void)79 void versal_ipi_config_table_init(void)
80 {
81 ipi_config_table_init(versal_ipi_table, ARRAY_SIZE(versal_ipi_table));
82 }
83