1 /* 2 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef TLKD_PRIVATE_H 8 #define TLKD_PRIVATE_H 9 10 #include <platform_def.h> 11 12 #include <arch.h> 13 #include <bl31/interrupt_mgmt.h> 14 #include <context.h> 15 #include <lib/psci/psci.h> 16 17 /* 18 * This flag is used by the TLKD to determine if the SP is servicing a yielding 19 * SMC request prior to programming the next entry into the SP e.g. if SP 20 * execution is preempted by a non-secure interrupt and handed control to the 21 * normal world. If another request which is distinct from what the SP was 22 * previously doing arrives, then this flag will be help the TLKD to either 23 * reject the new request or service it while ensuring that the previous context 24 * is not corrupted. 25 */ 26 #define YIELD_SMC_ACTIVE_FLAG_SHIFT 2 27 #define YIELD_SMC_ACTIVE_FLAG_MASK 1 28 #define get_yield_smc_active_flag(state) \ 29 (((state) >> YIELD_SMC_ACTIVE_FLAG_SHIFT) \ 30 & YIELD_SMC_ACTIVE_FLAG_MASK) 31 #define set_yield_smc_active_flag(state) ((state) |= \ 32 (1 << YIELD_SMC_ACTIVE_FLAG_SHIFT)) 33 #define clr_yield_smc_active_flag(state) ((state) &= \ 34 ~(YIELD_SMC_ACTIVE_FLAG_MASK \ 35 << YIELD_SMC_ACTIVE_FLAG_SHIFT)) 36 37 /******************************************************************************* 38 * Translate virtual address received from the NS world 39 ******************************************************************************/ 40 #define TLK_TRANSLATE_NS_VADDR 4 41 42 /******************************************************************************* 43 * Secure Payload execution state information i.e. aarch32 or aarch64 44 ******************************************************************************/ 45 #define SP_AARCH32 MODE_RW_32 46 #define SP_AARCH64 MODE_RW_64 47 48 /******************************************************************************* 49 * Number of cpus that the present on this platform. TODO: Rely on a topology 50 * tree to determine this in the future to avoid assumptions about mpidr 51 * allocation 52 ******************************************************************************/ 53 #define TLKD_CORE_COUNT PLATFORM_CORE_COUNT 54 55 /******************************************************************************* 56 * Constants that allow assembler code to preserve callee-saved registers of the 57 * C runtime context while performing a security state switch. 58 ******************************************************************************/ 59 #define TLKD_C_RT_CTX_X19 0x0 60 #define TLKD_C_RT_CTX_X20 0x8 61 #define TLKD_C_RT_CTX_X21 0x10 62 #define TLKD_C_RT_CTX_X22 0x18 63 #define TLKD_C_RT_CTX_X23 0x20 64 #define TLKD_C_RT_CTX_X24 0x28 65 #define TLKD_C_RT_CTX_X25 0x30 66 #define TLKD_C_RT_CTX_X26 0x38 67 #define TLKD_C_RT_CTX_X27 0x40 68 #define TLKD_C_RT_CTX_X28 0x48 69 #define TLKD_C_RT_CTX_X29 0x50 70 #define TLKD_C_RT_CTX_X30 0x58 71 #define TLKD_C_RT_CTX_SIZE 0x60 72 #define TLKD_C_RT_CTX_ENTRIES (TLKD_C_RT_CTX_SIZE >> DWORD_SHIFT) 73 74 #ifndef __ASSEMBLER__ 75 76 #include <stdint.h> 77 78 #include <lib/cassert.h> 79 80 /* AArch64 callee saved general purpose register context structure. */ 81 DEFINE_REG_STRUCT(c_rt_regs, TLKD_C_RT_CTX_ENTRIES); 82 83 /* 84 * Compile time assertion to ensure that both the compiler and linker 85 * have the same double word aligned view of the size of the C runtime 86 * register context. 87 */ 88 CASSERT(TLKD_C_RT_CTX_SIZE == sizeof(c_rt_regs_t), \ 89 assert_tlkd_c_rt_regs_size_mismatch); 90 91 /******************************************************************************* 92 * Structure which helps the SPD to maintain the per-cpu state of the SP. 93 * 'state' - collection of flags to track SP state e.g. on/off 94 * 'mpidr' - mpidr to associate a context with a cpu 95 * 'c_rt_ctx' - stack address to restore C runtime context from after 96 * returning from a synchronous entry into the SP. 97 * 'cpu_ctx' - space to maintain SP architectural state 98 * 'saved_tsp_args' - space to store arguments for TSP arithmetic operations 99 * which will queried using the TSP_GET_ARGS SMC by TSP. 100 ******************************************************************************/ 101 typedef struct tlk_context { 102 uint32_t state; 103 uint64_t mpidr; 104 uint64_t c_rt_ctx; 105 cpu_context_t cpu_ctx; 106 } tlk_context_t; 107 108 /******************************************************************************* 109 * Function & Data prototypes 110 ******************************************************************************/ 111 uint64_t tlkd_va_translate(uintptr_t va, int type); 112 uint64_t tlkd_enter_sp(uint64_t *c_rt_ctx); 113 void __dead2 tlkd_exit_sp(uint64_t c_rt_ctx, uint64_t ret); 114 uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx); 115 void __dead2 tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx, 116 uint64_t ret); 117 void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point, 118 uint32_t rw, 119 uint64_t pc, 120 tlk_context_t *tlk_ctx); 121 122 #endif /*__ASSEMBLER__*/ 123 124 #endif /* TLKD_PRIVATE_H */ 125