1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2014 Freescale Semiconductor, Inc.
4 */
5
6 #include <common.h>
7 #include <asm/arch/fsl_serdes.h>
8 #include <asm/arch/immap_ls102xa.h>
9
10 static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
11 [0x00] = {PCIE1, PCIE1, PCIE1, PCIE1},
12 [0x10] = {PCIE1, SATA1, PCIE2, PCIE2},
13 [0x20] = {PCIE1, SGMII_TSEC1, PCIE2, SGMII_TSEC2},
14 [0x30] = {PCIE1, SATA1, SGMII_TSEC1, SGMII_TSEC2},
15 [0x40] = {PCIE1, PCIE1, SATA1, SGMII_TSEC2},
16 [0x50] = {PCIE1, PCIE1, PCIE2, SGMII_TSEC2},
17 [0x60] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2},
18 [0x70] = {PCIE1, SATA1, PCIE2, SGMII_TSEC2},
19 [0x80] = {PCIE2, PCIE2, PCIE2, PCIE2},
20 };
21
serdes_get_prtcl(int serdes,int cfg,int lane)22 enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
23 {
24 return serdes_cfg_tbl[cfg][lane];
25 }
26
is_serdes_prtcl_valid(int serdes,u32 prtcl)27 int is_serdes_prtcl_valid(int serdes, u32 prtcl)
28 {
29 int i;
30
31 if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl))
32 return 0;
33
34 for (i = 0; i < SRDS_MAX_LANES; i++) {
35 if (serdes_cfg_tbl[prtcl][i] != NONE)
36 return 1;
37 }
38
39 return 0;
40 }
41