1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2016 Freescale Semiconductor, Inc.
4  * Copyright 2019 NXP
5  */
6 
7 #include <common.h>
8 #include <asm/arch/fsl_serdes.h>
9 #include <asm/arch/immap_lsch2.h>
10 
11 struct serdes_config {
12 	u32 protocol;
13 	u8 lanes[SRDS_MAX_LANES];
14 };
15 
16 static struct serdes_config serdes1_cfg_tbl[] = {
17 	/* SerDes 1 */
18 	{0x3333, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
19 		  SGMII_FM1_DTSEC6} },
20 	{0x1133, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC5,
21 		  SGMII_FM1_DTSEC6} },
22 	{0x1333, {XFI_FM1_MAC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
23 		  SGMII_FM1_DTSEC6} },
24 	{0x2333, {SGMII_2500_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
25 		  SGMII_FM1_DTSEC6} },
26 	{0x2233, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
27 		  SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
28 	{0x1040, {XFI_FM1_MAC9, NONE, QSGMII_FM1_A, NONE} },
29 	{0x2040, {SGMII_2500_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE} },
30 	{0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6} },
31 	{0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1,
32 		  SGMII_FM1_DTSEC6} },
33 	{0x3363, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, PCIE1,
34 		  SGMII_FM1_DTSEC6} },
35 	{0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
36 		  SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
37 	{0x3040, {SGMII_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE} },
38 	{}
39 };
40 
41 static struct serdes_config serdes2_cfg_tbl[] = {
42 	/* SerDes 2 */
43 	{0x8888, {PCIE1, PCIE1, PCIE1, PCIE1} },
44 	{0x5559, {PCIE1, PCIE2, PCIE3, SATA1} },
45 	{0x5577, {PCIE1, PCIE2, PCIE3, PCIE3} },
46 	{0x5506, {PCIE1, PCIE2, NONE, PCIE3} },
47 	{0x0506, {NONE, PCIE2, NONE, PCIE3} },
48 	{0x0559, {NONE, PCIE2, PCIE3, SATA1} },
49 	{0x5A59, {PCIE1, SGMII_FM1_DTSEC2, PCIE3, SATA1} },
50 	{0x5A06, {PCIE1, SGMII_FM1_DTSEC2, NONE, PCIE3} },
51 	{}
52 };
53 
54 static struct serdes_config *serdes_cfg_tbl[] = {
55 	serdes1_cfg_tbl,
56 	serdes2_cfg_tbl,
57 };
58 
serdes_get_prtcl(int serdes,int cfg,int lane)59 enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
60 {
61 	struct serdes_config *ptr;
62 
63 	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
64 		return 0;
65 
66 	ptr = serdes_cfg_tbl[serdes];
67 	while (ptr->protocol) {
68 		if (ptr->protocol == cfg)
69 			return ptr->lanes[lane];
70 		ptr++;
71 	}
72 
73 	return 0;
74 }
75 
is_serdes_prtcl_valid(int serdes,u32 prtcl)76 int is_serdes_prtcl_valid(int serdes, u32 prtcl)
77 {
78 	int i;
79 	struct serdes_config *ptr;
80 
81 	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
82 		return 0;
83 
84 	ptr = serdes_cfg_tbl[serdes];
85 	while (ptr->protocol) {
86 		if (ptr->protocol == prtcl)
87 			break;
88 		ptr++;
89 	}
90 
91 	if (!ptr->protocol)
92 		return 0;
93 
94 	for (i = 0; i < SRDS_MAX_LANES; i++) {
95 		if (ptr->lanes[i] != NONE)
96 			return 1;
97 	}
98 
99 	return 0;
100 }
101