1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada CP110 Master.
45 */
46
47#include <dt-bindings/comphy/comphy_data.h>
48
49/ {
50	cp110-master {
51		#address-cells = <2>;
52		#size-cells = <2>;
53		compatible = "simple-bus";
54		interrupt-parent = <&gic>;
55		ranges;
56
57		config-space {
58			#address-cells = <1>;
59			#size-cells = <1>;
60			compatible = "simple-bus";
61			interrupt-parent = <&gic>;
62			ranges = <0x0 0x0 0xf2000000 0x2000000>;
63
64			cpm_ethernet: ethernet@0 {
65				compatible = "marvell,armada-7k-pp22";
66				reg = <0x0 0x100000>, <0x129000 0xb000>;
67				clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
68				clock-names = "pp_clk", "gop_clk", "mg_clk";
69				status = "disabled";
70				dma-coherent;
71
72				cpm_eth0: eth0 {
73					interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
74					port-id = <0>;
75					gop-port-id = <0>;
76					status = "disabled";
77				};
78
79				cpm_eth1: eth1 {
80					interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
81					port-id = <1>;
82					gop-port-id = <2>;
83					status = "disabled";
84				};
85
86				cpm_eth2: eth2 {
87					interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
88					port-id = <2>;
89					gop-port-id = <3>;
90					status = "disabled";
91				};
92			};
93
94			cpm_mdio: mdio@12a200 {
95				#address-cells = <1>;
96				#size-cells = <0>;
97				compatible = "marvell,orion-mdio";
98				reg = <0x12a200 0x10>;
99				device-name = "cpm-mdio";
100			};
101
102			cpm_xmdio: mdio@12a600 {
103				#address-cells = <1>;
104				#size-cells = <0>;
105				compatible = "marvell,xmdio";
106				reg = <0x12a600 0x16>;
107				status = "disabled";
108				device-name = "cpm-xmdio";
109			};
110
111			cpm_syscon0: system-controller@440000 {
112				compatible = "marvell,cp110-system-controller0",
113					     "syscon";
114				reg = <0x440000 0x1000>;
115				#clock-cells = <2>;
116				core-clock-output-names =
117					"cpm-apll", "cpm-ppv2-core", "cpm-eip",
118					"cpm-core", "cpm-nand-core";
119				gate-clock-output-names =
120					"cpm-audio", "cpm-communit", "cpm-nand",
121					"cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
122					"cpm-mg-core", "cpm-xor1", "cpm-xor0",
123					"cpm-gop-dp", "none", "cpm-pcie_x10",
124					"cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
125					"cpm-sata", "cpm-sata-usb", "cpm-main",
126					"cpm-sd-mmc", "none", "none",
127					"cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
128					"cpm-usb3dev", "cpm-eip150", "cpm-eip197";
129			};
130
131			cpm_pinctl: cpm-pinctl@440000 {
132				compatible = "marvell,mvebu-pinctrl",
133					     "marvell,armada-7k-pinctrl",
134					     "marvell,armada-8k-cpm-pinctrl";
135				bank-name ="cp0-110";
136				reg = <0x440000 0x20>;
137				pin-count = <63>;
138				max-func = <0xf>;
139
140				cpm_i2c0_pins: cpm-i2c-pins-0 {
141					marvell,pins = < 37 38 >;
142					marvell,function = <2>;
143				};
144				cpm_i2c1_pins: cpm-i2c-pins-1 {
145					marvell,pins = < 35 36 >;
146					marvell,function = <2>;
147				};
148				cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 {
149					marvell,pins = < 44 45 46 47 48 49 50 51
150							 52 53 54 55 >;
151					marvell,function = <1>;
152				};
153				pca0_pins: cpm-pca0_pins {
154					marvell,pins = <62>;
155					marvell,function = <0>;
156				};
157				cpm_sdhci_pins: cpm-sdhi-pins-0 {
158					marvell,pins = < 56 57 58 59 60 61 >;
159					marvell,function = <14>;
160				};
161				cpm_spi0_pins: cpm-spi-pins-0 {
162					marvell,pins = < 13 14 15 16 >;
163					marvell,function = <3>;
164				};
165			};
166
167			cpm_gpio0: gpio@440100 {
168				compatible = "marvell,orion-gpio";
169				reg = <0x440100 0x40>;
170				ngpios = <32>;
171				gpiobase = <20>;
172				gpio-controller;
173				#gpio-cells = <2>;
174			};
175
176			cpm_gpio1: gpio@440140 {
177				compatible = "marvell,orion-gpio";
178				reg = <0x440140 0x40>;
179				ngpios = <31>;
180				gpiobase = <52>;
181				gpio-controller;
182				#gpio-cells = <2>;
183			};
184
185			cpm_sata0: sata@540000 {
186				compatible = "marvell,armada-8k-ahci";
187				reg = <0x540000 0x30000>;
188				interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
189				clocks = <&cpm_syscon0 1 15>;
190				status = "disabled";
191			};
192
193			cpm_usb3_0: usb3@500000 {
194				compatible = "marvell,armada-8k-xhci",
195					     "generic-xhci";
196				reg = <0x500000 0x4000>;
197				dma-coherent;
198				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
199				clocks = <&cpm_syscon0 1 22>;
200				status = "disabled";
201			};
202
203			cpm_usb3_1: usb3@510000 {
204				compatible = "marvell,armada-8k-xhci",
205					     "generic-xhci";
206				reg = <0x510000 0x4000>;
207				dma-coherent;
208				interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
209				clocks = <&cpm_syscon0 1 23>;
210				status = "disabled";
211			};
212
213			cpm_spi0: spi@700600 {
214				compatible = "marvell,armada-380-spi";
215				reg = <0x700600 0x50>;
216				#address-cells = <0x1>;
217				#size-cells = <0x0>;
218				cell-index = <1>;
219				clocks = <&cpm_syscon0 0 3>;
220				status = "disabled";
221			};
222
223			cpm_spi1: spi@700680 {
224				compatible = "marvell,armada-380-spi";
225				reg = <0x700680 0x50>;
226				#address-cells = <1>;
227				#size-cells = <0>;
228				cell-index = <2>;
229				clocks = <&cpm_syscon0 1 21>;
230				status = "disabled";
231			};
232
233			cpm_i2c0: i2c@701000 {
234				compatible = "marvell,mv78230-i2c";
235				reg = <0x701000 0x20>;
236				#address-cells = <1>;
237				#size-cells = <0>;
238				interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
239				clocks = <&cpm_syscon0 1 21>;
240				status = "disabled";
241			};
242
243			cpm_i2c1: i2c@701100 {
244				compatible = "marvell,mv78230-i2c";
245				reg = <0x701100 0x20>;
246				#address-cells = <1>;
247				#size-cells = <0>;
248				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
249				clocks = <&cpm_syscon0 1 21>;
250				status = "disabled";
251			};
252
253			cpm_comphy: comphy@441000 {
254				compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
255				reg = <0x441000 0x8>,
256				      <0x120000 0x8>;
257				mux-bitcount = <4>;
258				max-lanes = <6>;
259			};
260
261			cpm_utmi0: utmi@580000 {
262				compatible = "marvell,mvebu-utmi-2.6.0";
263				reg = <0x580000 0x1000>,	/* utmi-unit */
264				      <0x440420 0x4>,		/* usb-cfg */
265				      <0x440440 0x4>;		/* utmi-cfg */
266				utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
267				status = "disabled";
268			};
269
270			cpm_utmi1: utmi@581000 {
271				compatible = "marvell,mvebu-utmi-2.6.0";
272				reg = <0x581000 0x1000>,	/* utmi-unit */
273				      <0x440420 0x4>,		/* usb-cfg */
274				      <0x440444 0x4>;		/* utmi-cfg */
275				utmi-port = <UTMI_PHY_TO_USB3_HOST1>;
276				status = "disabled";
277			};
278
279			cpm_sdhci0: sdhci@780000 {
280				compatible = "marvell,armada-8k-sdhci";
281				reg = <0x780000 0x300>;
282				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
283				dma-coherent;
284				status = "disabled";
285			};
286
287			cpm_nand: nand@720000 {
288				compatible = "marvell,armada-8k-nand-controller",
289					"marvell,armada370-nand-controller";
290				reg = <0x720000 0x54>;
291				#address-cells = <1>;
292				#size-cells = <0>;
293				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
294				clock-names = "core", "reg";
295				clocks = <&cpm_syscon0 1 2>,
296					 <&cpm_syscon0 1 17>;
297				marvell,system-controller = <&cpm_syscon0>;
298				nand-enable-arbiter;
299				num-cs = <1>;
300				status = "disabled";
301			};
302
303		};
304
305		cpm_pcie0: pcie@f2600000 {
306			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
307			reg = <0 0xf2600000 0 0x10000>,
308			      <0 0xf6f00000 0 0x80000>;
309			reg-names = "ctrl", "config";
310			#address-cells = <3>;
311			#size-cells = <2>;
312			#interrupt-cells = <1>;
313			device_type = "pci";
314			dma-coherent;
315
316			bus-range = <0 0xff>;
317			ranges =
318				/* downstream I/O */
319				<0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000
320				/* non-prefetchable memory */
321				0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;
322			interrupt-map-mask = <0 0 0 0>;
323			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
324			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
325			num-lanes = <1>;
326			clocks = <&cpm_syscon0 1 13>;
327			status = "disabled";
328		};
329
330		cpm_pcie1: pcie@f2620000 {
331			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
332			reg = <0 0xf2620000 0 0x10000>,
333			      <0 0xf7f00000 0 0x80000>;
334			reg-names = "ctrl", "config";
335			#address-cells = <3>;
336			#size-cells = <2>;
337			#interrupt-cells = <1>;
338			device_type = "pci";
339			dma-coherent;
340
341			bus-range = <0 0xff>;
342			ranges =
343				/* downstream I/O */
344				<0x81000000 0 0xf9010000 0  0xf9010000 0 0x10000
345				/* non-prefetchable memory */
346				0x82000000 0 0xf7000000 0  0xf7000000 0 0xf00000>;
347			interrupt-map-mask = <0 0 0 0>;
348			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
349			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
350
351			num-lanes = <1>;
352			clocks = <&cpm_syscon0 1 11>;
353			status = "disabled";
354		};
355
356		cpm_pcie2: pcie@f2640000 {
357			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
358			reg = <0 0xf2640000 0 0x10000>,
359			      <0 0xf8f00000 0 0x80000>;
360			reg-names = "ctrl", "config";
361			#address-cells = <3>;
362			#size-cells = <2>;
363			#interrupt-cells = <1>;
364			device_type = "pci";
365			dma-coherent;
366
367			bus-range = <0 0xff>;
368			ranges =
369				/* downstream I/O */
370				<0x81000000 0 0xf9020000 0  0xf9020000 0 0x10000
371				/* non-prefetchable memory */
372				0x82000000 0 0xf8000000 0  0xf8000000 0 0xf00000>;
373			interrupt-map-mask = <0 0 0 0>;
374			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
375			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
376
377			num-lanes = <1>;
378			clocks = <&cpm_syscon0 1 12>;
379			status = "disabled";
380		};
381	};
382};
383