1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com> 4 * Copyright (C) 2021 Marc Ferland, Amotus Solutions Inc., <ferlandm@amotus.ca> 5 */ 6 7/dts-v1/; 8 9#include "imx6ull.dtsi" 10#include "imx6ull-dart-6ul.dtsi" 11 12/ { 13 model = "Variscite DART-6UL Evaluation Kit"; 14 compatible = "variscite,imx6ull-dart-6ul", "fsl,imx6ull"; 15}; 16 17&mdio1 { 18 /* KSZ8081RNB (carrier-board) */ 19 ethphy1: ethernet-phy@3 { 20 compatible = "ethernet-phy-ieee802.3-c22"; 21 clocks = <&clks IMX6UL_CLK_ENET2_REF>; 22 clock-names = "rmii-ref"; 23 micrel,led-mode = <1>; 24 max-speed = <100>; 25 reg = <3>; 26 }; 27}; 28 29&fec2 { 30 pinctrl-names = "default"; 31 pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_rst>; 32 phy-mode = "rmii"; 33 phy-handle = <ðphy1>; 34 phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 35 phy-reset-duration = <100>; 36 status = "okay"; 37}; 38 39&usdhc2 { 40 status = "okay"; 41}; 42 43&usbotg1 { 44 pinctrl-names = "default"; 45 pinctrl-0 = <&pinctrl_usb_otg1_id>; 46 dr_mode = "otg"; 47 srp-disable; 48 hnp-disable; 49 adp-disable; 50 status = "okay"; 51}; 52 53&iomuxc { 54 pinctrl-names = "default"; 55 56 pinctrl_usb_otg1_id: usbotg1idgrp { 57 fsl,pins = < 58 MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 59 >; 60 }; 61 62 pinctrl_enet2: enet2grp { 63 fsl,pins = < 64 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 65 MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 66 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 67 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 68 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 69 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 70 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 71 MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 72 >; 73 }; 74 75 pinctrl_enet2_mdio: mdio_enet2_grp { 76 fsl,pins = < 77 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 78 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 79 >; 80 }; 81 82 pinctrl_enet2_rst: enet2-rst-grp { 83 fsl,pins = < 84 MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0 85 >; 86 }; 87}; 88