1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  *Copyright 2019 Rockchip Electronics Co., Ltd.
4  */
5 #ifndef _ASM_ARCH_GRF_rk3308_H
6 #define _ASM_ARCH_GRF_rk3308_H
7 
8 struct rk3308_grf {
9 	unsigned int gpio0a_iomux;
10 	unsigned int reserved0;
11 	unsigned int gpio0b_iomux;
12 	unsigned int reserved1;
13 	unsigned int gpio0c_iomux;
14 	unsigned int reserved2[3];
15 	unsigned int gpio1a_iomux;
16 	unsigned int reserved3;
17 	unsigned int gpio1bl_iomux;
18 	unsigned int gpio1bh_iomux;
19 	unsigned int gpio1cl_iomux;
20 	unsigned int gpio1ch_iomux;
21 	unsigned int gpio1d_iomux;
22 	unsigned int reserved4;
23 	unsigned int gpio2a_iomux;
24 	unsigned int reserved5;
25 	unsigned int gpio2b_iomux;
26 	unsigned int reserved6;
27 	unsigned int gpio2c_iomux;
28 	unsigned int reserved7[3];
29 	unsigned int gpio3a_iomux;
30 	unsigned int reserved8;
31 	unsigned int gpio3b_iomux;
32 	unsigned int reserved9[5];
33 	unsigned int gpio4a_iomux;
34 	unsigned int reserved33;
35 	unsigned int gpio4b_iomux;
36 	unsigned int reserved10;
37 	unsigned int gpio4c_iomux;
38 	unsigned int reserved11;
39 	unsigned int gpio4d_iomux;
40 	unsigned int reserved34;
41 	unsigned int gpio0a_p;
42 	unsigned int gpio0b_p;
43 	unsigned int gpio0c_p;
44 	unsigned int reserved12;
45 	unsigned int gpio1a_p;
46 	unsigned int gpio1b_p;
47 	unsigned int gpio1c_p;
48 	unsigned int gpio1d_p;
49 	unsigned int gpio2a_p;
50 	unsigned int gpio2b_p;
51 	unsigned int gpio2c_p;
52 	unsigned int reserved13;
53 	unsigned int gpio3a_p;
54 	unsigned int gpio3b_p;
55 	unsigned int reserved14[2];
56 	unsigned int gpio4a_p;
57 	unsigned int gpio4b_p;
58 	unsigned int gpio4c_p;
59 	unsigned int gpio4d_p;
60 	unsigned int reserved15[(0x100 - 0xec) / 4 - 1];
61 	unsigned int gpio0a_e;
62 	unsigned int gpio0b_e;
63 	unsigned int gpio0c_e;
64 	unsigned int reserved16;
65 	unsigned int gpio1a_e;
66 	unsigned int gpio1b_e;
67 	unsigned int gpio1c_e;
68 	unsigned int gpio1d_e;
69 	unsigned int gpio2a_e;
70 	unsigned int gpio2b_e;
71 	unsigned int gpio2c_e;
72 	unsigned int reserved17;
73 	unsigned int gpio3a_e;
74 	unsigned int gpio3b_e;
75 	unsigned int reserved18[2];
76 	unsigned int gpio4a_e;
77 	unsigned int gpio4b_e;
78 	unsigned int gpio4c_e;
79 	unsigned int gpio4d_e;
80 	unsigned int gpio0a_sr;
81 	unsigned int gpio0b_sr;
82 	unsigned int gpio0c_sr;
83 	unsigned int reserved19;
84 	unsigned int gpio1a_sr;
85 	unsigned int gpio1b_sr;
86 	unsigned int gpio1c_sr;
87 	unsigned int gpio1d_sr;
88 	unsigned int gpio2a_sr;
89 	unsigned int gpio2b_sr;
90 	unsigned int gpio2c_sr;
91 	unsigned int reserved20;
92 	unsigned int gpio3a_sr;
93 	unsigned int gpio3b_sr;
94 	unsigned int reserved21[2];
95 	unsigned int gpio4a_sr;
96 	unsigned int gpio4b_sr;
97 	unsigned int gpio4c_sr;
98 	unsigned int gpio4d_sr;
99 	unsigned int gpio0a_smt;
100 	unsigned int gpio0b_smt;
101 	unsigned int gpio0c_smt;
102 	unsigned int reserved22;
103 	unsigned int gpio1a_smt;
104 	unsigned int gpio1b_smt;
105 	unsigned int gpio1c_smt;
106 	unsigned int gpio1d_smt;
107 	unsigned int gpio2a_smt;
108 	unsigned int gpio2b_smt;
109 	unsigned int gpio2c_smt;
110 	unsigned int reserved23;
111 	unsigned int gpio3a_smt;
112 	unsigned int gpio3b_smt;
113 	unsigned int reserved35[2];
114 	unsigned int gpio4a_smt;
115 	unsigned int gpio4b_smt;
116 	unsigned int gpio4c_smt;
117 	unsigned int gpio4d_smt;
118 	unsigned int reserved24[(0x300 - 0x1EC) / 4 - 1];
119 	unsigned int soc_con0;
120 	unsigned int soc_con1;
121 	unsigned int soc_con2;
122 	unsigned int soc_con3;
123 	unsigned int soc_con4;
124 	unsigned int soc_con5;
125 	unsigned int soc_con6;
126 	unsigned int soc_con7;
127 	unsigned int soc_con8;
128 	unsigned int soc_con9;
129 	unsigned int soc_con10;
130 	unsigned int reserved25[(0x380 - 0x328) / 4 - 1];
131 	unsigned int soc_status0;
132 	unsigned int reserved26[(0x400 - 0x380) / 4 - 1];
133 	unsigned int cpu_con0;
134 	unsigned int cpu_con1;
135 	unsigned int cpu_con2;
136 	unsigned int reserved27[(0x420 - 0x408) / 4 - 1];
137 	unsigned int cpu_status0;
138 	unsigned int cpu_status1;
139 	unsigned int reserved28[(0x440 - 0x424) / 4 - 1];
140 	unsigned int pvtm_con0;
141 	unsigned int pvtm_con1;
142 	unsigned int pvtm_status0;
143 	unsigned int pvtm_status1;
144 	unsigned int reserved29[(0x460 - 0x44C) / 4 - 1];
145 	unsigned int tsadc_tbl;
146 	unsigned int tsadc_tbh;
147 	unsigned int reserved30[(0x480 - 0x464) / 4 - 1];
148 	unsigned int host0_con0;
149 	unsigned int host0_con1;
150 	unsigned int otg_con0;
151 	unsigned int host0_status0;
152 	unsigned int reserved31[(0x4a0 - 0x48C) / 4 - 1];
153 	unsigned int mac_con0;
154 	unsigned int upctrl_con0;
155 	unsigned int upctrl_status0;
156 	unsigned int reserved32[(0x500 - 0x4A8) / 4 - 1];
157 	unsigned int os_reg0;
158 	unsigned int os_reg1;
159 	unsigned int os_reg2;
160 	unsigned int os_reg3;
161 	unsigned int os_reg4;
162 	unsigned int os_reg5;
163 	unsigned int os_reg6;
164 	unsigned int os_reg7;
165 	unsigned int os_reg8;
166 	unsigned int os_reg9;
167 	unsigned int os_reg10;
168 	unsigned int os_reg11;
169 	unsigned int reserved38[(0x600 - 0x52c) / 4 - 1];
170 	unsigned int soc_con12;
171 	unsigned int reserved39;
172 	unsigned int soc_con13;
173 	unsigned int soc_con14;
174 	unsigned int soc_con15;
175 	unsigned int reserved40[(0x800 - 0x610) / 4 - 1];
176 	unsigned int chip_id;
177 };
178 check_member(rk3308_grf, gpio0a_p, 0xa0);
179 
180 struct rk3308_sgrf {
181 	unsigned int soc_con0;
182 	unsigned int soc_con1;
183 	unsigned int con_tzma_r0size;
184 	unsigned int con_secure0;
185 	unsigned int reserved0;
186 	unsigned int clk_timer_en;
187 	unsigned int clkgat_con;
188 	unsigned int fastboot_addr;
189 	unsigned int fastboot_en;
190 	unsigned int reserved1[(0x30 - 0x24) / 4];
191 	unsigned int srst_con;
192 };
193 check_member(rk3308_sgrf, fastboot_en, 0x20);
194 
195 #endif
196