1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2016 Google, Inc 4 */ 5 #include <common.h> 6 #include <dm.h> 7 #include <init.h> 8 #include <log.h> 9 #include <ram.h> 10 #include <timer.h> 11 #include <asm/global_data.h> 12 #include <asm/io.h> 13 #include <asm/arch/timer.h> 14 #include <asm/arch/wdt.h> 15 #include <linux/err.h> 16 #include <dm/uclass.h> 17 18 /* 19 * Second Watchdog Timer by default is configured 20 * to trigger secondary boot source. 21 */ 22 #define AST_2ND_BOOT_WDT 1 23 24 /* 25 * Third Watchdog Timer by default is configured 26 * to toggle Flash address mode switch before reset. 27 */ 28 #define AST_FLASH_ADDR_DETECT_WDT 2 29 30 DECLARE_GLOBAL_DATA_PTR; 31 board_init(void)32int board_init(void) 33 { 34 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 35 36 return 0; 37 } 38 dram_init(void)39int dram_init(void) 40 { 41 struct udevice *dev; 42 struct ram_info ram; 43 int ret; 44 45 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 46 if (ret) { 47 debug("DRAM FAIL1\r\n"); 48 return ret; 49 } 50 51 ret = ram_get_info(dev, &ram); 52 if (ret) { 53 debug("DRAM FAIL2\r\n"); 54 return ret; 55 } 56 57 gd->ram_size = ram.size; 58 59 return 0; 60 } 61