1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) Aspeed Technology Inc.
4 */
5 #include <common.h>
6 #include <dm.h>
7 #include <ram.h>
8 #include <timer.h>
9 #include <asm/io.h>
10 #include <asm/arch/timer.h>
11 #include <linux/bitops.h>
12 #include <linux/err.h>
13 #include <dm/uclass.h>
14 #include <asm/arch/scu_ast2600.h>
15 #include <asm/global_data.h>
16
17 DECLARE_GLOBAL_DATA_PTR;
18
19 /* Memory Control registers */
20 #define MCR_BASE 0x1e6e0000
21 #define MCR_CONF (MCR_BASE + 0x004)
22
23 /* bit fields of MCR_CONF */
24 #define MCR_CONF_ECC_EN BIT(7)
25 #define MCR_CONF_VGA_MEMSZ_MASK GENMASK(3, 2)
26 #define MCR_CONF_VGA_MEMSZ_SHIFT 2
27 #define MCR_CONF_MEMSZ_MASK GENMASK(1, 0)
28 #define MCR_CONF_MEMSZ_SHIFT 0
29
dram_init(void)30 int dram_init(void)
31 {
32 int ret;
33 struct udevice *dev;
34 struct ram_info ram;
35
36 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
37 if (ret) {
38 debug("cannot get DRAM driver\n");
39 return ret;
40 }
41
42 ret = ram_get_info(dev, &ram);
43 if (ret) {
44 debug("cannot get DRAM information\n");
45 return ret;
46 }
47
48 gd->ram_size = ram.size;
49 return 0;
50 }
51
board_init(void)52 int board_init(void)
53 {
54 int i = 0, rc;
55 struct udevice *dev;
56
57 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
58
59 while (1) {
60 rc = uclass_get_device(UCLASS_MISC, i++, &dev);
61 if (rc)
62 break;
63 }
64
65 return 0;
66 }
67
board_add_ram_info(int use_default)68 void board_add_ram_info(int use_default)
69 {
70 int rc;
71 uint32_t conf;
72 uint32_t ecc, act_size, vga_rsvd;
73 struct udevice *scu_dev;
74 struct ast2600_scu *scu;
75
76 rc = uclass_get_device_by_driver(UCLASS_CLK,
77 DM_DRIVER_GET(aspeed_ast2600_scu), &scu_dev);
78 if (rc) {
79 debug("%s: cannot find SCU device, rc=%d\n", __func__, rc);
80 return;
81 }
82
83 scu = devfdt_get_addr_ptr(scu_dev);
84 if (IS_ERR_OR_NULL(scu)) {
85 debug("%s: cannot get SCU address pointer\n", __func__);
86 return;
87 }
88
89 conf = readl(MCR_CONF);
90
91 ecc = conf & MCR_CONF_ECC_EN;
92 act_size = 0x100 << ((conf & MCR_CONF_MEMSZ_MASK) >> MCR_CONF_MEMSZ_SHIFT);
93 vga_rsvd = 0x8 << ((conf & MCR_CONF_VGA_MEMSZ_MASK) >> MCR_CONF_VGA_MEMSZ_SHIFT);
94
95 /* no VGA reservation if efuse VGA disable bit is set */
96 if (readl(scu->efuse) & SCU_EFUSE_DIS_VGA)
97 vga_rsvd = 0;
98
99 printf(" (capacity:%d MiB, VGA:%d MiB), ECC %s", act_size,
100 vga_rsvd, (ecc) ? "on" : "off");
101 }
102
enable_caches(void)103 void enable_caches(void)
104 {
105 /* get rid of the warning message */
106 }
107