1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2010 4 * Reinhard Meyer, reinhard.meyer@emk-elektronik.de 5 * (C) Copyright 2009 6 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 7 * (C) Copyright 2013 8 * Bo Shen <voice.shen@atmel.com> 9 */ 10 11 #include <common.h> 12 #include <cpu_func.h> 13 #include <init.h> 14 #include <vsprintf.h> 15 #include <asm/io.h> 16 #include <asm/arch/hardware.h> 17 #include <asm/arch/at91_pit.h> 18 #include <asm/arch/at91_gpbr.h> 19 #include <asm/arch/clk.h> 20 21 #ifndef CONFIG_SYS_AT91_MAIN_CLOCK 22 #define CONFIG_SYS_AT91_MAIN_CLOCK 0 23 #endif 24 arch_cpu_init(void)25int arch_cpu_init(void) 26 { 27 #if defined(CONFIG_CLK_CCF) 28 return 0; 29 #else 30 return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); 31 #endif 32 } 33 arch_preboot_os(void)34void arch_preboot_os(void) 35 { 36 #if (IS_ENABLED(CONFIG_ATMEL_PIT_TIMER)) 37 ulong cpiv; 38 at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT; 39 40 cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir)); 41 42 /* 43 * Disable PITC 44 * Add 0x1000 to current counter to stop it faster 45 * without waiting for wrapping back to 0 46 */ 47 writel(cpiv + 0x1000, &pit->mr); 48 #endif 49 } 50 51 #if defined(CONFIG_DISPLAY_CPUINFO) print_cpuinfo(void)52int print_cpuinfo(void) 53 { 54 char buf[32]; 55 56 printf("CPU: %s\n", get_cpu_name()); 57 printf("Crystal frequency: %8s MHz\n", 58 strmhz(buf, get_main_clk_rate())); 59 printf("CPU clock : %8s MHz\n", 60 strmhz(buf, get_cpu_clk_rate())); 61 printf("Master clock : %8s MHz\n", 62 strmhz(buf, get_mck_clk_rate())); 63 64 return 0; 65 } 66 #endif 67 enable_caches(void)68void enable_caches(void) 69 { 70 icache_enable(); 71 dcache_enable(); 72 } 73 74 #define ATMEL_CHIPID_CIDR_VERSION 0x1f 75 get_chip_id(void)76unsigned int get_chip_id(void) 77 { 78 return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION; 79 } 80 get_extension_chip_id(void)81unsigned int get_extension_chip_id(void) 82 { 83 return readl(ATMEL_CHIPID_EXID); 84 } 85