1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2011-2015 by Vladimir Zapolskiy <vz@mleia.com>
4 */
5
6 #include <common.h>
7 #include <cpu_func.h>
8 #include <init.h>
9 #include <net.h>
10 #include <netdev.h>
11 #include <asm/arch/cpu.h>
12 #include <asm/arch/clk.h>
13 #include <asm/arch/wdt.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/io.h>
16
17 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
18 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE;
19
reset_cpu(ulong addr)20 void reset_cpu(ulong addr)
21 {
22 /* Enable watchdog clock */
23 setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
24
25 /* To be compatible with the original U-Boot code:
26 * addr: - 0: perform hard reset.
27 * - !=0: perform a soft reset; i.e. "RESOUT_N" not asserted). */
28 if (addr == 0) {
29 /* Reset pulse length is 13005 peripheral clock frames */
30 writel(13000, &wdt->pulse);
31
32 /* Force WDOG_RESET2 and RESOUT_N signal active */
33 writel(WDTIM_MCTRL_RESFRC2 | WDTIM_MCTRL_RESFRC1
34 | WDTIM_MCTRL_M_RES2, &wdt->mctrl);
35 } else {
36 /* Force match output active */
37 writel(0x01, &wdt->emr);
38
39 /* Internal reset on match output (no pulse on "RESOUT_N") */
40 writel(WDTIM_MCTRL_M_RES1, &wdt->mctrl);
41 }
42
43 while (1)
44 /* NOP */;
45 }
46
47 #if defined(CONFIG_ARCH_CPU_INIT)
arch_cpu_init(void)48 int arch_cpu_init(void)
49 {
50 /*
51 * It might be necessary to flush data cache, if U-Boot is loaded
52 * from kickstart bootloader, e.g. from S1L loader
53 */
54 flush_dcache_all();
55
56 return 0;
57 }
58 #else
59 #error "You have to select CONFIG_ARCH_CPU_INIT"
60 #endif
61
62 #if defined(CONFIG_DISPLAY_CPUINFO)
print_cpuinfo(void)63 int print_cpuinfo(void)
64 {
65 printf("CPU: NXP LPC32XX\n");
66 printf("CPU clock: %uMHz\n", get_hclk_pll_rate() / 1000000);
67 printf("AHB bus clock: %uMHz\n", get_hclk_clk_rate() / 1000000);
68 printf("Peripheral clock: %uMHz\n", get_periph_clk_rate() / 1000000);
69
70 return 0;
71 }
72 #endif
73
74 #ifdef CONFIG_LPC32XX_ETH
cpu_eth_init(struct bd_info * bis)75 int cpu_eth_init(struct bd_info *bis)
76 {
77 lpc32xx_eth_initialize(bis);
78 return 0;
79 }
80 #endif
81