1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5 #include <common.h>
6 #include <dm.h>
7 #include <hang.h>
8 #include <init.h>
9 #include <led.h>
10 #include <log.h>
11 #include <syscon.h>
12 #include <asm/global_data.h>
13 #include <asm/io.h>
14 #include <asm/arch-rockchip/bootrom.h>
15 #include <asm/arch-rockchip/clock.h>
16 #include <asm/arch-rockchip/grf_rk3188.h>
17 #include <asm/arch-rockchip/hardware.h>
18 #include <linux/err.h>
19
20 #define GRF_BASE 0x20008000
21
22 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
23 [BROM_BOOTSOURCE_EMMC] = "/dwmmc@1021c000",
24 [BROM_BOOTSOURCE_SD] = "/dwmmc@10214000",
25 };
26
27 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
board_debug_uart_init(void)28 void board_debug_uart_init(void)
29 {
30 /* Enable early UART on the RK3188 */
31 struct rk3188_grf * const grf = (void *)GRF_BASE;
32 enum {
33 GPIO1B1_SHIFT = 2,
34 GPIO1B1_MASK = 3,
35 GPIO1B1_GPIO = 0,
36 GPIO1B1_UART2_SOUT,
37 GPIO1B1_JTAG_TDO,
38
39 GPIO1B0_SHIFT = 0,
40 GPIO1B0_MASK = 3,
41 GPIO1B0_GPIO = 0,
42 GPIO1B0_UART2_SIN,
43 GPIO1B0_JTAG_TDI,
44 };
45
46 rk_clrsetreg(&grf->gpio1b_iomux,
47 GPIO1B1_MASK << GPIO1B1_SHIFT |
48 GPIO1B0_MASK << GPIO1B0_SHIFT,
49 GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
50 GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
51 }
52 #endif
53
54 #ifdef CONFIG_SPL_BUILD
arch_cpu_init(void)55 int arch_cpu_init(void)
56 {
57 struct rk3188_grf *grf;
58
59 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
60 if (IS_ERR(grf)) {
61 pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
62 return 0;
63 }
64 #ifdef CONFIG_ROCKCHIP_USB_UART
65 rk_clrsetreg(&grf->uoc0_con[0],
66 SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
67 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
68 1 << COMMON_ON_N_SHIFT);
69 rk_clrsetreg(&grf->uoc0_con[2],
70 SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
71 rk_clrsetreg(&grf->uoc0_con[3],
72 OPMODE_MASK | XCVRSELECT_MASK |
73 TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
74 OPMODE_NODRIVING << OPMODE_SHIFT |
75 XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
76 1 << TERMSEL_FULLSPEED_SHIFT |
77 1 << SUSPENDN_SHIFT);
78 rk_clrsetreg(&grf->uoc0_con[0],
79 BYPASSSEL_MASK | BYPASSDMEN_MASK,
80 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
81 #endif
82 return 0;
83 }
84 #endif
85
rk3188_board_late_init(void)86 __weak int rk3188_board_late_init(void)
87 {
88 return 0;
89 }
90
rk_board_late_init(void)91 int rk_board_late_init(void)
92 {
93 struct rk3188_grf *grf;
94
95 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
96 if (IS_ERR(grf)) {
97 pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
98 return 0;
99 }
100
101 /* enable noc remap to mimic legacy loaders */
102 rk_clrsetreg(&grf->soc_con0,
103 NOC_REMAP_MASK << NOC_REMAP_SHIFT,
104 NOC_REMAP_MASK << NOC_REMAP_SHIFT);
105
106 return rk3188_board_late_init();
107 }
108
109 #ifdef CONFIG_SPL_BUILD
110 DECLARE_GLOBAL_DATA_PTR;
setup_led(void)111 static int setup_led(void)
112 {
113 #ifdef CONFIG_SPL_LED
114 struct udevice *dev;
115 char *led_name;
116 int ret;
117
118 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
119 if (!led_name)
120 return 0;
121 ret = led_get_by_label(led_name, &dev);
122 if (ret) {
123 debug("%s: get=%d\n", __func__, ret);
124 return ret;
125 }
126 ret = led_set_state(dev, LEDST_ON);
127 if (ret)
128 return ret;
129 #endif
130
131 return 0;
132 }
133
spl_board_init(void)134 void spl_board_init(void)
135 {
136 int ret;
137
138 ret = setup_led();
139 if (ret) {
140 debug("LED ret=%d\n", ret);
141 hang();
142 }
143 }
144 #endif
145