1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3 * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
4 */
5
6 #include <common.h>
7 #include <console.h>
8 #include <dm.h>
9 #include <dfu.h>
10 #include <malloc.h>
11 #include <serial.h>
12 #include <watchdog.h>
13 #include <dm/lists.h>
14 #include <dm/device-internal.h>
15 #include <linux/delay.h>
16 #include <asm/global_data.h>
17 #include "stm32prog.h"
18
19 /* - configuration part -----------------------------*/
20 #define USART_BL_VERSION 0x40 /* USART bootloader version V4.0*/
21 #define UBOOT_BL_VERSION 0x03 /* bootloader version V0.3*/
22 #define DEVICE_ID_BYTE1 0x05 /* MSB byte of device ID*/
23 #define DEVICE_ID_BYTE2 0x00 /* LSB byte of device ID*/
24 #define USART_RAM_BUFFER_SIZE 256 /* Size of USART_RAM_Buf buffer*/
25
26 /* - Commands -----------------------------*/
27 #define GET_CMD_COMMAND 0x00 /* Get CMD command*/
28 #define GET_VER_COMMAND 0x01 /* Get Version command*/
29 #define GET_ID_COMMAND 0x02 /* Get ID command*/
30 #define GET_PHASE_COMMAND 0x03 /* Get Phase command*/
31 #define RM_COMMAND 0x11 /* Read Memory command*/
32 #define READ_PART_COMMAND 0x12 /* Read Partition command*/
33 #define START_COMMAND 0x21 /* START command (Go)*/
34 #define DOWNLOAD_COMMAND 0x31 /* Download command*/
35 /* existing command for other STM32 but not used */
36 /* ERASE 0x43 */
37 /* EXTENDED_ERASE 0x44 */
38 /* WRITE_UNPROTECTED 0x73 */
39 /* READOUT_PROTECT 0x82 */
40 /* READOUT_UNPROTECT 0x92 */
41
42 /* - miscellaneous defines ----------------------------------------*/
43 #define INIT_BYTE 0x7F /*Init Byte ID*/
44 #define ACK_BYTE 0x79 /*Acknowlede Byte ID*/
45 #define NACK_BYTE 0x1F /*No Acknowlede Byte ID*/
46 #define ABORT_BYTE 0x5F /*ABORT*/
47
48 struct udevice *down_serial_dev;
49
50 const u8 cmd_id[] = {
51 GET_CMD_COMMAND,
52 GET_VER_COMMAND,
53 GET_ID_COMMAND,
54 GET_PHASE_COMMAND,
55 RM_COMMAND,
56 READ_PART_COMMAND,
57 START_COMMAND,
58 DOWNLOAD_COMMAND
59 };
60
61 #define NB_CMD sizeof(cmd_id)
62
63 /* DFU support for serial *********************************************/
stm32prog_get_entity(struct stm32prog_data * data)64 static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
65 {
66 int alt_id;
67
68 if (!data->cur_part)
69 if (data->phase == PHASE_FLASHLAYOUT)
70 alt_id = 0;
71 else
72 return NULL;
73 else
74 alt_id = data->cur_part->alt_id;
75
76 return dfu_get_entity(alt_id);
77 }
78
stm32prog_write(struct stm32prog_data * data,u8 * buffer,u32 buffer_size)79 static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
80 u32 buffer_size)
81 {
82 struct dfu_entity *dfu_entity;
83 u8 ret = 0;
84
85 dfu_entity = stm32prog_get_entity(data);
86 if (!dfu_entity)
87 return -ENODEV;
88
89 ret = dfu_write(dfu_entity,
90 buffer,
91 buffer_size,
92 data->dfu_seq);
93
94 if (ret) {
95 stm32prog_err("DFU write failed [%d] cnt: %d",
96 ret, data->dfu_seq);
97 }
98 data->dfu_seq++;
99 /* handle rollover as in driver/dfu/dfu.c */
100 data->dfu_seq &= 0xffff;
101 if (buffer_size == 0)
102 data->dfu_seq = 0; /* flush done */
103
104 return ret;
105 }
106
stm32prog_read(struct stm32prog_data * data,u8 phase,u32 offset,u8 * buffer,u32 buffer_size)107 static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
108 u8 *buffer, u32 buffer_size)
109 {
110 struct dfu_entity *dfu_entity;
111 struct stm32prog_part_t *part;
112 u32 size;
113 int ret, i;
114
115 if (data->dfu_seq) {
116 stm32prog_err("DFU write pending for phase %d, seq %d",
117 data->phase, data->dfu_seq);
118 return -EINVAL;
119 }
120 if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
121 stm32prog_err("read failed : phase %d is invalid", phase);
122 return -EINVAL;
123 }
124 if (data->read_phase <= PHASE_LAST_USER &&
125 phase != data->read_phase) {
126 /* clear previous read session */
127 dfu_entity = dfu_get_entity(data->read_phase - 1);
128 if (dfu_entity)
129 dfu_transaction_cleanup(dfu_entity);
130 }
131
132 dfu_entity = NULL;
133 /* found partition for the expected phase */
134 for (i = 0; i < data->part_nb; i++) {
135 part = &data->part_array[i];
136 if (part->id == phase)
137 dfu_entity = dfu_get_entity(part->alt_id);
138 }
139 if (!dfu_entity) {
140 stm32prog_err("read failed : phase %d is unknown", phase);
141 return -ENODEV;
142 }
143
144 /* clear pending read before to force offset */
145 if (dfu_entity->inited &&
146 (data->read_phase != phase || data->offset != offset))
147 dfu_transaction_cleanup(dfu_entity);
148
149 /* initiate before to force offset */
150 if (!dfu_entity->inited) {
151 ret = dfu_transaction_initiate(dfu_entity, true);
152 if (ret < 0) {
153 stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
154 ret, phase, offset);
155 return ret;
156 }
157 }
158 /* force new offset */
159 if (dfu_entity->offset != offset)
160 dfu_entity->offset = offset;
161 data->offset = offset;
162 data->read_phase = phase;
163 log_debug("\nSTM32 download read %s offset=0x%x\n",
164 dfu_entity->name, offset);
165 ret = dfu_read(dfu_entity, buffer, buffer_size,
166 dfu_entity->i_blk_seq_num);
167 if (ret < 0) {
168 stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
169 ret, phase, offset);
170 return ret;
171 }
172
173 size = ret;
174
175 if (size < buffer_size) {
176 data->offset = 0;
177 data->read_phase = PHASE_END;
178 memset(buffer + size, 0, buffer_size - size);
179 } else {
180 data->offset += size;
181 }
182
183 return ret;
184 }
185
186 /* UART access ***************************************************/
stm32prog_serial_init(struct stm32prog_data * data,int link_dev)187 int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
188 {
189 struct udevice *dev = NULL;
190 struct dm_serial_ops *ops;
191 /* no parity, 8 bits, 1 stop */
192 u32 serial_config = SERIAL_DEFAULT_CONFIG;
193
194 down_serial_dev = NULL;
195
196 if (uclass_get_device_by_seq(UCLASS_SERIAL, link_dev, &dev)) {
197 log_err("serial %d device not found\n", link_dev);
198 return -ENODEV;
199 }
200
201 down_serial_dev = dev;
202
203 /* force silent console on uart only when used */
204 if (gd->cur_serial_dev == down_serial_dev)
205 gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
206 else
207 gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
208
209 ops = serial_get_ops(down_serial_dev);
210
211 if (!ops) {
212 log_err("serial %d = %s missing ops\n", link_dev, dev->name);
213 return -ENODEV;
214 }
215 if (!ops->setconfig) {
216 log_err("serial %d = %s missing setconfig\n", link_dev, dev->name);
217 return -ENODEV;
218 }
219
220 clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
221
222 data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
223 USART_RAM_BUFFER_SIZE);
224
225 return ops->setconfig(down_serial_dev, serial_config);
226 }
227
stm32prog_serial_flush(void)228 static void stm32prog_serial_flush(void)
229 {
230 struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
231 int err;
232
233 do {
234 err = ops->getc(down_serial_dev);
235 } while (err != -EAGAIN);
236 }
237
stm32prog_serial_getc_err(void)238 static int stm32prog_serial_getc_err(void)
239 {
240 struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
241 int err;
242
243 do {
244 err = ops->getc(down_serial_dev);
245 if (err == -EAGAIN) {
246 ctrlc();
247 WATCHDOG_RESET();
248 }
249 } while ((err == -EAGAIN) && (!had_ctrlc()));
250
251 return err;
252 }
253
stm32prog_serial_getc(void)254 static u8 stm32prog_serial_getc(void)
255 {
256 int err;
257
258 err = stm32prog_serial_getc_err();
259
260 return err >= 0 ? err : 0;
261 }
262
stm32prog_serial_get_buffer(u8 * buffer,u32 * count)263 static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
264 {
265 struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
266 int err;
267
268 do {
269 err = ops->getc(down_serial_dev);
270 if (err >= 0) {
271 *buffer++ = err;
272 *count -= 1;
273 } else if (err == -EAGAIN) {
274 ctrlc();
275 WATCHDOG_RESET();
276 } else {
277 break;
278 }
279 } while (*count && !had_ctrlc());
280
281 return !!(err < 0);
282 }
283
stm32prog_serial_putc(u8 w_byte)284 static void stm32prog_serial_putc(u8 w_byte)
285 {
286 struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
287 int err;
288
289 do {
290 err = ops->putc(down_serial_dev, w_byte);
291 } while (err == -EAGAIN);
292 }
293
294 /* Helper function ************************************************/
295
stm32prog_header(struct stm32prog_data * data)296 static u8 stm32prog_header(struct stm32prog_data *data)
297 {
298 u8 ret;
299 u8 boot = 0;
300 struct dfu_entity *dfu_entity;
301 u64 size = 0;
302
303 dfu_entity = stm32prog_get_entity(data);
304 if (!dfu_entity)
305 return -ENODEV;
306
307 printf("\nSTM32 download write %s\n", dfu_entity->name);
308
309 /* force cleanup to avoid issue with previous read */
310 dfu_transaction_cleanup(dfu_entity);
311
312 ret = stm32prog_header_check(data->header_data,
313 &data->header);
314
315 /* no header : max size is partition size */
316 if (ret) {
317 dfu_entity->get_medium_size(dfu_entity, &size);
318 data->header.image_length = size;
319 }
320
321 /**** Flash the header if necessary for boot partition */
322 if (data->phase < PHASE_FIRST_USER)
323 boot = 1;
324
325 /* write header if boot partition */
326 if (boot) {
327 if (ret) {
328 stm32prog_err("invalid header (error %d)", ret);
329 } else {
330 ret = stm32prog_write(data,
331 (u8 *)data->header_data,
332 BL_HEADER_SIZE);
333 }
334 } else {
335 if (ret)
336 printf(" partition without checksum\n");
337 ret = 0;
338 }
339
340 free(data->header_data);
341 data->header_data = NULL;
342
343 return ret;
344 }
345
stm32prog_start(struct stm32prog_data * data,u32 address)346 static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
347 {
348 u8 ret = 0;
349 struct dfu_entity *dfu_entity;
350
351 if (address < 0x100) {
352 if (address == PHASE_OTP)
353 return stm32prog_otp_start(data);
354
355 if (address == PHASE_PMIC)
356 return stm32prog_pmic_start(data);
357
358 if (address == PHASE_RESET || address == PHASE_END) {
359 data->cur_part = NULL;
360 data->dfu_seq = 0;
361 data->phase = address;
362 return 0;
363 }
364 if (address != data->phase) {
365 stm32prog_err("invalid received phase id %d, current phase is %d",
366 (u8)address, (u8)data->phase);
367 return -EINVAL;
368 }
369 }
370 /* check the last loaded partition */
371 if (address == DEFAULT_ADDRESS || address == data->phase) {
372 switch (data->phase) {
373 case PHASE_END:
374 case PHASE_RESET:
375 case PHASE_DO_RESET:
376 data->cur_part = NULL;
377 data->phase = PHASE_DO_RESET;
378 return 0;
379 }
380 dfu_entity = stm32prog_get_entity(data);
381 if (!dfu_entity)
382 return -ENODEV;
383
384 ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
385 if (ret) {
386 stm32prog_err("DFU flush failed [%d]", ret);
387 return ret;
388 }
389 data->dfu_seq = 0;
390
391 printf("\n received length = 0x%x\n", data->cursor);
392 if (data->header.present) {
393 if (data->cursor !=
394 (data->header.image_length + BL_HEADER_SIZE)) {
395 stm32prog_err("transmission interrupted (length=0x%x expected=0x%x)",
396 data->cursor,
397 data->header.image_length +
398 BL_HEADER_SIZE);
399 return -EIO;
400 }
401 if (data->header.image_checksum != data->checksum) {
402 stm32prog_err("invalid checksum received (0x%x expected 0x%x)",
403 data->checksum,
404 data->header.image_checksum);
405 return -EIO;
406 }
407 printf("\n checksum OK (0x%x)\n", data->checksum);
408 }
409
410 /* update DFU with received flashlayout */
411 if (data->phase == PHASE_FLASHLAYOUT)
412 stm32prog_dfu_init(data);
413 } else {
414 void (*entry)(void) = (void *)address;
415
416 printf("## Starting application at 0x%x ...\n", address);
417 (*entry)();
418 printf("## Application terminated\n");
419 ret = -ENOEXEC;
420 }
421
422 return ret;
423 }
424
425 /**
426 * get_address() - Get address if it is valid
427 *
428 * @tmp_xor: Current xor value to update
429 * @return The address area
430 */
get_address(u8 * tmp_xor)431 static u32 get_address(u8 *tmp_xor)
432 {
433 u32 address = 0x0;
434 u8 data;
435
436 data = stm32prog_serial_getc();
437 *tmp_xor ^= data;
438 address |= ((u32)data) << 24;
439
440 data = stm32prog_serial_getc();
441 address |= ((u32)data) << 16;
442 *tmp_xor ^= data;
443
444 data = stm32prog_serial_getc();
445 address |= ((u32)data) << 8;
446 *tmp_xor ^= data;
447
448 data = stm32prog_serial_getc();
449 address |= ((u32)data);
450 *tmp_xor ^= data;
451
452 return address;
453 }
454
stm32prog_serial_result(u8 result)455 static void stm32prog_serial_result(u8 result)
456 {
457 /* always flush fifo before to send result */
458 stm32prog_serial_flush();
459 stm32prog_serial_putc(result);
460 }
461
462 /* Command -----------------------------------------------*/
463 /**
464 * get_cmd_command() - Respond to Get command
465 *
466 * @data: Current command context
467 */
get_cmd_command(struct stm32prog_data * data)468 static void get_cmd_command(struct stm32prog_data *data)
469 {
470 u32 counter = 0x0;
471
472 stm32prog_serial_putc(NB_CMD);
473 stm32prog_serial_putc(USART_BL_VERSION);
474
475 for (counter = 0; counter < NB_CMD; counter++)
476 stm32prog_serial_putc(cmd_id[counter]);
477
478 stm32prog_serial_result(ACK_BYTE);
479 }
480
481 /**
482 * get_version_command() - Respond to Get Version command
483 *
484 * @data: Current command context
485 */
get_version_command(struct stm32prog_data * data)486 static void get_version_command(struct stm32prog_data *data)
487 {
488 stm32prog_serial_putc(UBOOT_BL_VERSION);
489 stm32prog_serial_result(ACK_BYTE);
490 }
491
492 /**
493 * get_id_command() - Respond to Get ID command
494 *
495 * @data: Current command context
496 */
get_id_command(struct stm32prog_data * data)497 static void get_id_command(struct stm32prog_data *data)
498 {
499 /* Send Device IDCode */
500 stm32prog_serial_putc(0x1);
501 stm32prog_serial_putc(DEVICE_ID_BYTE1);
502 stm32prog_serial_putc(DEVICE_ID_BYTE2);
503 stm32prog_serial_result(ACK_BYTE);
504 }
505
506 /**
507 * get_phase_command() - Respond to Get phase
508 *
509 * @data: Current command context
510 */
get_phase_command(struct stm32prog_data * data)511 static void get_phase_command(struct stm32prog_data *data)
512 {
513 char *err_msg = NULL;
514 u8 i, length = 0;
515 u32 destination = DEFAULT_ADDRESS; /* destination address */
516 int phase = data->phase;
517
518 if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
519 err_msg = stm32prog_get_error(data);
520 length = strlen(err_msg);
521 }
522 if (phase == PHASE_FLASHLAYOUT)
523 destination = STM32_DDR_BASE;
524
525 stm32prog_serial_putc(length + 5); /* Total length */
526 stm32prog_serial_putc(phase & 0xFF); /* partition ID */
527 stm32prog_serial_putc(destination); /* byte 1 of address */
528 stm32prog_serial_putc(destination >> 8); /* byte 2 of address */
529 stm32prog_serial_putc(destination >> 16); /* byte 3 of address */
530 stm32prog_serial_putc(destination >> 24); /* byte 4 of address */
531
532 stm32prog_serial_putc(length); /* Information length */
533 for (i = 0; i < length; i++)
534 stm32prog_serial_putc(err_msg[i]);
535 stm32prog_serial_result(ACK_BYTE);
536
537 if (phase == PHASE_RESET)
538 stm32prog_do_reset(data);
539 }
540
541 /**
542 * read_memory_command() - Read data from memory
543 *
544 * @data: Current command context
545 */
read_memory_command(struct stm32prog_data * data)546 static void read_memory_command(struct stm32prog_data *data)
547 {
548 u32 address = 0x0;
549 u8 rcv_data = 0x0, tmp_xor = 0x0;
550 u32 counter = 0x0;
551
552 /* Read memory address */
553 address = get_address(&tmp_xor);
554
555 /* If address memory is not received correctly */
556 rcv_data = stm32prog_serial_getc();
557 if (rcv_data != tmp_xor) {
558 stm32prog_serial_result(NACK_BYTE);
559 return;
560 }
561
562 stm32prog_serial_result(ACK_BYTE);
563
564 /* Read the number of bytes to be received:
565 * Max NbrOfData = Data + 1 = 256
566 */
567 rcv_data = stm32prog_serial_getc();
568 tmp_xor = ~rcv_data;
569 if (stm32prog_serial_getc() != tmp_xor) {
570 stm32prog_serial_result(NACK_BYTE);
571 return;
572 }
573
574 /* If checksum is correct send ACK */
575 stm32prog_serial_result(ACK_BYTE);
576
577 /* Send data to the host:
578 * Number of data to read = data + 1
579 */
580 for (counter = (rcv_data + 1); counter != 0; counter--)
581 stm32prog_serial_putc(*(u8 *)(address++));
582 }
583
584 /**
585 * start_command() - Respond to start command
586 *
587 * Jump to user application in RAM or partition check
588 *
589 * @data: Current command context
590 */
start_command(struct stm32prog_data * data)591 static void start_command(struct stm32prog_data *data)
592 {
593 u32 address = 0;
594 u8 tmp_xor = 0x0;
595 u8 ret, rcv_data;
596
597 /* Read memory address */
598 address = get_address(&tmp_xor);
599
600 /* If address memory is not received correctly */
601 rcv_data = stm32prog_serial_getc();
602 if (rcv_data != tmp_xor) {
603 stm32prog_serial_result(NACK_BYTE);
604 return;
605 }
606 /* validate partition */
607 ret = stm32prog_start(data,
608 address);
609
610 if (ret)
611 stm32prog_serial_result(ABORT_BYTE);
612 else
613 stm32prog_serial_result(ACK_BYTE);
614 }
615
616 /**
617 * download_command() - Respond to download command
618 *
619 * Write data to not volatile memory, Flash
620 *
621 * @data: Current command context
622 */
download_command(struct stm32prog_data * data)623 static void download_command(struct stm32prog_data *data)
624 {
625 u32 address = 0x0;
626 u8 my_xor = 0x0;
627 u8 rcv_xor;
628 u32 counter = 0x0, codesize = 0x0;
629 u8 *ramaddress = 0;
630 u8 rcv_data = 0x0;
631 struct image_header_s *image_header = &data->header;
632 u32 cursor = data->cursor;
633 long size = 0;
634 u8 operation;
635 u32 packet_number;
636 u32 result = ACK_BYTE;
637 u8 ret;
638 unsigned int i;
639 bool error;
640 int rcv;
641
642 address = get_address(&my_xor);
643
644 /* If address memory is not received correctly */
645 rcv_xor = stm32prog_serial_getc();
646 if (rcv_xor != my_xor) {
647 result = NACK_BYTE;
648 goto end;
649 }
650
651 /* If address valid send ACK */
652 stm32prog_serial_result(ACK_BYTE);
653
654 /* get packet number and operation type */
655 operation = (u8)((u32)address >> 24);
656 packet_number = ((u32)(((u32)address << 8))) >> 8;
657
658 switch (operation) {
659 /* supported operation */
660 case PHASE_FLASHLAYOUT:
661 case PHASE_OTP:
662 case PHASE_PMIC:
663 break;
664 default:
665 result = NACK_BYTE;
666 goto end;
667 }
668 /* check the packet number */
669 if (packet_number == 0) {
670 /* erase: re-initialize the image_header struct */
671 data->packet_number = 0;
672 if (data->header_data)
673 memset(data->header_data, 0, BL_HEADER_SIZE);
674 else
675 data->header_data = calloc(1, BL_HEADER_SIZE);
676 cursor = 0;
677 data->cursor = 0;
678 data->checksum = 0;
679 /*idx = cursor;*/
680 } else {
681 data->packet_number++;
682 }
683
684 /* Check with the number of current packet if the device receive
685 * the true packet
686 */
687 if (packet_number != data->packet_number) {
688 data->packet_number--;
689 result = NACK_BYTE;
690 goto end;
691 }
692
693 /*-- Read number of bytes to be written and data -----------*/
694
695 /* Read the number of bytes to be written:
696 * Max NbrOfData = data + 1 <= 256
697 */
698 rcv_data = stm32prog_serial_getc();
699
700 /* NbrOfData to write = data + 1 */
701 codesize = rcv_data + 0x01;
702
703 if (codesize > USART_RAM_BUFFER_SIZE) {
704 result = NACK_BYTE;
705 goto end;
706 }
707
708 /* Checksum Initialization */
709 my_xor = rcv_data;
710
711 /* UART receive data and send to Buffer */
712 counter = codesize;
713 error = stm32prog_serial_get_buffer(data->buffer, &counter);
714
715 /* read checksum */
716 if (!error) {
717 rcv = stm32prog_serial_getc_err();
718 error = !!(rcv < 0);
719 rcv_xor = rcv;
720 }
721
722 if (error) {
723 printf("transmission error on packet %d, byte %d\n",
724 packet_number, codesize - counter);
725 /* waiting end of packet before flush & NACK */
726 mdelay(30);
727 data->packet_number--;
728 result = NACK_BYTE;
729 goto end;
730 }
731
732 /* Compute Checksum */
733 ramaddress = data->buffer;
734 for (counter = codesize; counter != 0; counter--)
735 my_xor ^= *(ramaddress++);
736
737 /* If Checksum is incorrect */
738 if (rcv_xor != my_xor) {
739 printf("checksum error on packet %d\n",
740 packet_number);
741 /* wait to be sure that all data are received
742 * in the FIFO before flush
743 */
744 mdelay(30);
745 data->packet_number--;
746 result = NACK_BYTE;
747 goto end;
748 }
749
750 /* Update current position in buffer */
751 data->cursor += codesize;
752
753 if (operation == PHASE_OTP) {
754 size = data->cursor - cursor;
755 /* no header for OTP */
756 if (stm32prog_otp_write(data, cursor,
757 data->buffer, &size))
758 result = ABORT_BYTE;
759 goto end;
760 }
761
762 if (operation == PHASE_PMIC) {
763 size = data->cursor - cursor;
764 /* no header for PMIC */
765 if (stm32prog_pmic_write(data, cursor,
766 data->buffer, &size))
767 result = ABORT_BYTE;
768 goto end;
769 }
770
771 if (cursor < BL_HEADER_SIZE) {
772 /* size = portion of header in this chunck */
773 if (data->cursor >= BL_HEADER_SIZE)
774 size = BL_HEADER_SIZE - cursor;
775 else
776 size = data->cursor - cursor;
777 memcpy((void *)((u32)(data->header_data) + cursor),
778 data->buffer, size);
779 cursor += size;
780
781 if (cursor == BL_HEADER_SIZE) {
782 /* Check and Write the header */
783 if (stm32prog_header(data)) {
784 result = ABORT_BYTE;
785 goto end;
786 }
787 } else {
788 goto end;
789 }
790 }
791
792 if (image_header->present) {
793 if (data->cursor <= BL_HEADER_SIZE)
794 goto end;
795 /* compute checksum on payload */
796 for (i = (unsigned long)size; i < codesize; i++)
797 data->checksum += data->buffer[i];
798
799 if (data->cursor >
800 image_header->image_length + BL_HEADER_SIZE) {
801 log_err("expected size exceeded\n");
802 result = ABORT_BYTE;
803 goto end;
804 }
805
806 /* write data (payload) */
807 ret = stm32prog_write(data,
808 &data->buffer[size],
809 codesize - size);
810 } else {
811 /* write all */
812 ret = stm32prog_write(data,
813 data->buffer,
814 codesize);
815 }
816 if (ret)
817 result = ABORT_BYTE;
818
819 end:
820 stm32prog_serial_result(result);
821 }
822
823 /**
824 * read_partition() - Respond to read command
825 *
826 * Read data from not volatile memory, Flash
827 *
828 * @data: Current command context
829 */
read_partition_command(struct stm32prog_data * data)830 static void read_partition_command(struct stm32prog_data *data)
831 {
832 u32 i, part_id, codesize, offset = 0, rcv_data;
833 long size;
834 u8 tmp_xor;
835 int res;
836 u8 buffer[256];
837
838 part_id = stm32prog_serial_getc();
839 tmp_xor = part_id;
840
841 offset = get_address(&tmp_xor);
842
843 rcv_data = stm32prog_serial_getc();
844 if (rcv_data != tmp_xor) {
845 log_debug("1st checksum received = %x, computed %x\n",
846 rcv_data, tmp_xor);
847 goto error;
848 }
849 stm32prog_serial_putc(ACK_BYTE);
850
851 /* NbrOfData to read = data + 1 */
852 rcv_data = stm32prog_serial_getc();
853 codesize = rcv_data + 0x01;
854 tmp_xor = rcv_data;
855
856 rcv_data = stm32prog_serial_getc();
857 if ((rcv_data ^ tmp_xor) != 0xFF) {
858 log_debug("2nd checksum received = %x, computed %x\n",
859 rcv_data, tmp_xor);
860 goto error;
861 }
862
863 log_debug("%s : %x\n", __func__, part_id);
864 rcv_data = 0;
865 switch (part_id) {
866 case PHASE_OTP:
867 size = codesize;
868 if (!stm32prog_otp_read(data, offset, buffer, &size))
869 rcv_data = size;
870 break;
871 case PHASE_PMIC:
872 size = codesize;
873 if (!stm32prog_pmic_read(data, offset, buffer, &size))
874 rcv_data = size;
875 break;
876 default:
877 res = stm32prog_read(data, part_id, offset,
878 buffer, codesize);
879 if (res > 0)
880 rcv_data = res;
881 break;
882 }
883 if (rcv_data > 0) {
884 stm32prog_serial_putc(ACK_BYTE);
885 /*----------- Send data to the host -----------*/
886 for (i = 0; i < rcv_data; i++)
887 stm32prog_serial_putc(buffer[i]);
888 /*----------- Send filler to the host -----------*/
889 for (; i < codesize; i++)
890 stm32prog_serial_putc(0x0);
891 return;
892 }
893 stm32prog_serial_result(ABORT_BYTE);
894 return;
895
896 error:
897 stm32prog_serial_result(NACK_BYTE);
898 }
899
900 /* MAIN function = SERIAL LOOP ***********************************************/
901
902 /**
903 * stm32prog_serial_loop() - USART bootloader Loop routine
904 *
905 * @data: Current command context
906 * @return true if reset is needed after loop
907 */
stm32prog_serial_loop(struct stm32prog_data * data)908 bool stm32prog_serial_loop(struct stm32prog_data *data)
909 {
910 u32 counter = 0x0;
911 u8 command = 0x0;
912 u8 found;
913 int phase = data->phase;
914
915 /* element of cmd_func need to aligned with cmd_id[]*/
916 void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
917 /* GET_CMD_COMMAND */ get_cmd_command,
918 /* GET_VER_COMMAND */ get_version_command,
919 /* GET_ID_COMMAND */ get_id_command,
920 /* GET_PHASE_COMMAND */ get_phase_command,
921 /* RM_COMMAND */ read_memory_command,
922 /* READ_PART_COMMAND */ read_partition_command,
923 /* START_COMMAND */ start_command,
924 /* DOWNLOAD_COMMAND */ download_command
925 };
926
927 /* flush and NACK pending command received during u-boot init
928 * request command reemit
929 */
930 stm32prog_serial_result(NACK_BYTE);
931
932 clear_ctrlc(); /* forget any previous Control C */
933 while (!had_ctrlc()) {
934 phase = data->phase;
935
936 if (phase == PHASE_DO_RESET)
937 return true;
938
939 /* Get the user command: read first byte */
940 command = stm32prog_serial_getc();
941
942 if (command == INIT_BYTE) {
943 puts("\nConnected\n");
944 stm32prog_serial_result(ACK_BYTE);
945 continue;
946 }
947
948 found = 0;
949 for (counter = 0; counter < NB_CMD; counter++)
950 if (cmd_id[counter] == command) {
951 found = 1;
952 break;
953 }
954 if (found)
955 if ((command ^ stm32prog_serial_getc()) != 0xFF)
956 found = 0;
957 if (!found) {
958 /* wait to be sure that all data are received
959 * in the FIFO before flush (CMD and XOR)
960 */
961 mdelay(3);
962 stm32prog_serial_result(NACK_BYTE);
963 } else {
964 stm32prog_serial_result(ACK_BYTE);
965 cmd_func[counter](data);
966 }
967 WATCHDOG_RESET();
968 }
969
970 /* clean device */
971 if (gd->cur_serial_dev == down_serial_dev) {
972 /* restore console on uart */
973 gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
974 }
975 down_serial_dev = NULL;
976
977 return false; /* no reset after ctrlc */
978 }
979