1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 */
5
6 #define LOG_CATEGORY LOGC_ARCH
7
8 #include <common.h>
9 #include <cpu_func.h>
10 #include <dm.h>
11 #include <hang.h>
12 #include <init.h>
13 #include <log.h>
14 #include <spl.h>
15 #include <asm/cache.h>
16 #include <asm/global_data.h>
17 #include <asm/io.h>
18 #include <asm/arch/sys_proto.h>
19 #include <linux/libfdt.h>
20
spl_boot_device(void)21 u32 spl_boot_device(void)
22 {
23 u32 boot_mode;
24
25 boot_mode = get_bootmode();
26
27 switch (boot_mode) {
28 case BOOT_FLASH_SD_1:
29 case BOOT_FLASH_EMMC_1:
30 return BOOT_DEVICE_MMC1;
31 case BOOT_FLASH_SD_2:
32 case BOOT_FLASH_EMMC_2:
33 return BOOT_DEVICE_MMC2;
34 case BOOT_SERIAL_UART_1:
35 case BOOT_SERIAL_UART_2:
36 case BOOT_SERIAL_UART_3:
37 case BOOT_SERIAL_UART_4:
38 case BOOT_SERIAL_UART_5:
39 case BOOT_SERIAL_UART_6:
40 case BOOT_SERIAL_UART_7:
41 case BOOT_SERIAL_UART_8:
42 return BOOT_DEVICE_UART;
43 case BOOT_SERIAL_USB_OTG:
44 return BOOT_DEVICE_USB;
45 case BOOT_FLASH_NAND_FMC:
46 return BOOT_DEVICE_NAND;
47 case BOOT_FLASH_NOR_QSPI:
48 return BOOT_DEVICE_SPI;
49 case BOOT_FLASH_SPINAND_1:
50 return BOOT_DEVICE_NONE; /* SPINAND not supported in SPL */
51 }
52
53 return BOOT_DEVICE_MMC1;
54 }
55
spl_mmc_boot_mode(const u32 boot_device)56 u32 spl_mmc_boot_mode(const u32 boot_device)
57 {
58 return MMCSD_MODE_RAW;
59 }
60
61 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
spl_mmc_boot_partition(const u32 boot_device)62 int spl_mmc_boot_partition(const u32 boot_device)
63 {
64 switch (boot_device) {
65 case BOOT_DEVICE_MMC1:
66 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION;
67 case BOOT_DEVICE_MMC2:
68 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2;
69 default:
70 return -EINVAL;
71 }
72 }
73 #endif
74
75 #ifdef CONFIG_SPL_DISPLAY_PRINT
spl_display_print(void)76 void spl_display_print(void)
77 {
78 DECLARE_GLOBAL_DATA_PTR;
79 const char *model;
80
81 /* same code than show_board_info() but not compiled for SPL
82 * see CONFIG_DISPLAY_BOARDINFO & common/board_info.c
83 */
84 model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
85 if (model)
86 log_info("Model: %s\n", model);
87 }
88 #endif
89
board_early_init_f(void)90 __weak int board_early_init_f(void)
91 {
92 return 0;
93 }
94
board_init_f(ulong dummy)95 void board_init_f(ulong dummy)
96 {
97 struct udevice *dev;
98 int ret;
99
100 arch_cpu_init();
101
102 ret = spl_early_init();
103 if (ret) {
104 log_debug("spl_early_init() failed: %d\n", ret);
105 hang();
106 }
107
108 ret = uclass_get_device(UCLASS_CLK, 0, &dev);
109 if (ret) {
110 log_debug("Clock init failed: %d\n", ret);
111 hang();
112 }
113
114 ret = uclass_get_device(UCLASS_RESET, 0, &dev);
115 if (ret) {
116 log_debug("Reset init failed: %d\n", ret);
117 hang();
118 }
119
120 ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
121 if (ret) {
122 log_debug("%s: Cannot find pinctrl device\n", __func__);
123 hang();
124 }
125
126 /* enable console uart printing */
127 preloader_console_init();
128
129 ret = board_early_init_f();
130 if (ret) {
131 log_debug("board_early_init_f() failed: %d\n", ret);
132 hang();
133 }
134
135 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
136 if (ret) {
137 log_err("DRAM init failed: %d\n", ret);
138 hang();
139 }
140
141 /*
142 * activate cache on DDR only when DDR is fully initialized
143 * to avoid speculative access and issue in get_ram_size()
144 */
145 if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
146 mmu_set_region_dcache_behaviour(STM32_DDR_BASE,
147 CONFIG_DDR_CACHEABLE_SIZE,
148 DCACHE_DEFAULT_OPTION);
149 }
150
spl_board_prepare_for_boot(void)151 void spl_board_prepare_for_boot(void)
152 {
153 dcache_disable();
154 }
155
spl_board_prepare_for_linux(void)156 void spl_board_prepare_for_linux(void)
157 {
158 dcache_disable();
159 }
160