1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2013 Freescale Semiconductor, Inc.
4 */
5
6 #include <config.h>
7 #include <common.h>
8 #include <log.h>
9 #include <asm/io.h>
10 #include <asm/immap_85xx.h>
11 #include <asm/fsl_serdes.h>
12
13 #define SRDS1_MAX_LANES 4
14
15 static u32 serdes1_prtcl_map;
16
17 struct serdes_config {
18 u32 protocol;
19 u8 lanes[SRDS1_MAX_LANES];
20 };
21
22 static const struct serdes_config serdes1_cfg_tbl[] = {
23 /* SerDes 1 */
24 {1, {PCIE1, PCIE1, PCIE1, PCIE1} },
25 {2, {PCIE1, PCIE1, PCIE1, PCIE1} },
26 {3, {PCIE1, PCIE1, NONE, NONE} },
27 {4, {PCIE1, PCIE1, NONE, NONE} },
28 {5, {PCIE1, NONE, NONE, NONE} },
29 {6, {PCIE1, NONE, NONE, NONE} },
30 {}
31 };
32
is_serdes_configured(enum srds_prtcl device)33 int is_serdes_configured(enum srds_prtcl device)
34 {
35 if (!(serdes1_prtcl_map & (1 << NONE)))
36 fsl_serdes_init();
37
38 return (1 << device) & serdes1_prtcl_map;
39 }
40
fsl_serdes_init(void)41 void fsl_serdes_init(void)
42 {
43 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
44 u32 pordevsr = in_be32(&gur->pordevsr);
45 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
46 MPC85xx_PORDEVSR_IO_SEL_SHIFT;
47 const struct serdes_config *ptr;
48 int lane;
49
50 if (serdes1_prtcl_map & (1 << NONE))
51 return;
52
53 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
54
55 if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
56 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
57 return;
58 }
59
60 ptr = &serdes1_cfg_tbl[srds_cfg];
61 if (!ptr->protocol)
62 return;
63
64 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
65 enum srds_prtcl lane_prtcl = ptr->lanes[lane];
66 serdes1_prtcl_map |= (1 << lane_prtcl);
67 }
68
69 /* Set the first bit to indicate serdes has been initialized */
70 serdes1_prtcl_map |= (1 << NONE);
71 }
72